wok-6.x view memtest/stuff/memtest86+-6-386.patch @ rev 25513

memtest: update sleep()
author Pascal Bellard <pascal.bellard@slitaz.org>
date Tue Feb 14 15:41:57 2023 +0000 (16 months ago)
parents e92394c9bae5
children 1bbf846a10de
line source
1 --- system/cpuinfo.c
2 +++ system/cpuinfo.c
3 @@ -490,6 +490,10 @@
5 static void determine_cpu_model(void)
6 {
7 + if (cpuid_info.version.family <= 4) {
8 + pause_at_start = false;
9 + }
10 +
11 // If we can get a brand string use it, and we are done.
12 if (cpuid_info.max_xcpuid >= 0x80000004) {
13 cpu_model = cpuid_info.brand_id.str;
14 @@ -848,6 +852,12 @@
15 default:
16 // Unknown processor - make a guess at the family.
17 switch (cpuid_info.version.family) {
18 + case 3:
19 + cpu_model = "386";
20 + break;
21 + case 4:
22 + cpu_model = "486";
23 + break;
24 case 5:
25 cpu_model = "586";
26 break;
27 --- system/cpuid.c
28 +++ system/cpuid.c
29 @@ -8,6 +8,27 @@
30 #include <stdint.h>
32 #include "cpuid.h"
33 +#include "config.h"
34 +
35 +#define AC_BIT (1<<18)
36 +#define CPUID_BIT (1<<21)
37 +static inline int has_cpuid(int bits)
38 +{
39 + int eax, edx;
40 + __asm__ __volatile__(
41 + "pushfl\n\t"
42 + "popl %0\n\t"
43 + "movl %0,%1\n\t"
44 + "xorl %2,%0\n\t"
45 + "pushl %0\n\t"
46 + "popfl\n\t"
47 + "pushfl\n\t"
48 + "popl %0\n\t"
49 + "pushl %1\n\t"
50 + "popfl\n\t"
51 + "xorl %1,%0":"=a" (eax),"=d" (edx):"c" (bits));
52 + return eax;
53 +}
55 //------------------------------------------------------------------------------
56 // Public Variables
57 @@ -24,6 +45,15 @@
58 uint32_t reg[4];
59 char *p, *q;
61 + switch (has_cpuid(AC_BIT|CPUID_BIT)) {
62 + case 0:
63 + cpuid_info.version.family = 3;
64 + return;
65 + case AC_BIT:
66 + cpuid_info.version.family = 4;
67 + return;
68 + }
69 +
70 // Get the max standard cpuid & vendor ID.
71 cpuid(0x0, 0,
72 &cpuid_info.max_cpuid,
73 --- boot/setup.S
74 +++ boot/setup.S
75 @@ -100,6 +100,29 @@
76 .long 0x10
78 do_setup:
79 +
80 + # Check cpuid support
81 +
82 + pushfl
83 + popw %dx
84 + popw %ax
85 + xorb $0x20, %al # toggle CPUID feature bit (21)
86 + pushw %ax
87 + pushw %dx
88 + popfl
89 + pushfl
90 + popw %dx
91 + popw %ax
92 + xorb %dl, %al
93 + and $0x20, %al
94 + jz 1f
95 + pushw $0x1000
96 + popw %ds
97 + movb $0xa8, %al # testb $imm %al opcode
98 + movw %ax, patch1
99 + movw %ax, patch2
100 +1:
101 +
102 # Reload the segment registers, except for the stack.
104 movw %cs, %ax
105 --- boot/startup32.S
106 +++ boot/startup32.S
107 @@ -105,6 +105,8 @@
109 # ...and check if the processor supports long mode.
111 +patch1:
112 + jmp 1f
113 movl $0x80000000, %eax # check if function 0x80000001 is available
114 pushl %ebx # ebx is overwritten by cpuid
115 cpuid
116 @@ -198,6 +200,8 @@
118 # Enable PAE if supported.
120 +patch2:
121 + jmp 1f
122 pushl %ebx # ebx is overwritten by cpuid
123 movl $0x00000001, %eax # test the PAE flag
124 cpuid
125 --- system/cache.h
126 +++ system/cache.h
127 @@ -1,6 +1,7 @@
128 // SPDX-License-Identifier: GPL-2.0
129 #ifndef CACHE_H
130 #define CACHE_H
131 +#include "cpuid.h"
132 /**
133 * \file
134 *
135 @@ -26,6 +27,7 @@
136 : "rax", "memory"
137 );
138 #else
139 + if (cpuid_info.version.family >= 4)
140 __asm__ __volatile__ ("\t"
141 "movl %%cr0, %%eax \n\t"
142 "orl $0x40000000, %%eax \n\t" /* Set CD */
143 @@ -53,6 +55,7 @@
144 : "rax", "memory"
145 );
146 #else
147 + // if (cpuid_info.version.family >= 4)
148 __asm__ __volatile__ ("\t"
149 "movl %%cr0, %%eax \n\t"
150 "andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
151 @@ -69,6 +72,7 @@
152 */
153 static inline void cache_flush(void)
154 {
155 + if (cpuid_info.version.family >= 4)
156 __asm__ __volatile__ ("\t"
157 "wbinvd\n"
158 : /* no outputs */
159 --- app/main.c
160 +++ app/main.c
161 @@ -75,6 +75,7 @@
163 static volatile int init_state = 0;
165 +static uintptr_t low_load_limit = LOW_LOAD_LIMIT;
166 static uintptr_t low_load_addr;
167 static uintptr_t high_load_addr;
169 @@ -205,6 +206,9 @@
171 cpuid_init();
173 + if (cpuid_info.version.family <= 4) // down to 1MB memory size support
174 + low_load_limit = SIZE_C(256,KB); // must be a multiple of the page size
175 +
176 // Nothing before this should access the boot parameters, in case they are located above 4GB.
177 // This is the first region we map, so it is guaranteed not to fail.
178 boot_params_addr = map_region(boot_params_addr, sizeof(boot_params_t), true);
179 @@ -282,8 +286,8 @@
181 size_t program_size = (_stacks - _start) + BSP_STACK_SIZE + (num_enabled_cpus - 1) * AP_STACK_SIZE;
183 - bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, LOW_LOAD_LIMIT)
184 - && set_load_addr(&high_load_addr, program_size, LOW_LOAD_LIMIT, HIGH_LOAD_LIMIT);
185 + bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, low_load_limit)
186 + && set_load_addr(&high_load_addr, program_size, low_load_limit, HIGH_LOAD_LIMIT);
188 trace(0, "program size %ikB", (int)(program_size / 1024));
189 trace(0, " low_load_addr %0*x", 2*sizeof(uintptr_t), low_load_addr);
190 @@ -420,7 +424,7 @@
191 // Relocation may disrupt the test.
192 window_num = 1;
193 }
194 - if (window_num == 0 && pm_limit_lower >= LOW_LOAD_LIMIT) {
195 + if (window_num == 0 && pm_limit_lower >= low_load_limit) {
196 // Avoid unnecessary relocation.
197 window_num = 1;
198 }
199 @@ -443,10 +447,10 @@
200 switch (window_num) {
201 case 0:
202 window_start = 0;
203 - window_end = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
204 + window_end = (low_load_limit >> PAGE_SHIFT);
205 break;
206 case 1:
207 - window_start = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
208 + window_start = (low_load_limit >> PAGE_SHIFT);
209 window_end = VM_WINDOW_SIZE;
210 break;
211 default:
212 --- lib/unistd.c
213 +++ lib/unistd.c
214 @@ -5,10 +5,17 @@
216 #include "cpuinfo.h"
217 #include "tsc.h"
218 +#include "io.h"
220 #include "unistd.h"
222 //------------------------------------------------------------------------------
223 +// Constants
224 +//------------------------------------------------------------------------------
225 +
226 +#define PIT_TICKS_50mS 59659 // PIT clock is 1.193182MHz
227 +
228 +//------------------------------------------------------------------------------
229 // Public Functions
230 //------------------------------------------------------------------------------
232 @@ -22,9 +29,14 @@
233 __builtin_ia32_pause();
234 } while ((get_tsc() - t0) < cycles);
235 } else {
236 - // This will be highly inaccurate, but should give at least the requested delay.
237 - volatile uint64_t count = (uint64_t)usec * 1000;
238 + volatile uint64_t count = (uint64_t)usec / 50000;
239 while (count > 0) {
240 + // Use PIT Timer
241 + outb((inb(0x61) & ~0x02) | 0x01, 0x61);
242 + outb(0xb0, 0x43);
243 + outb(PIT_TICKS_50mS & 0xff, 0x42);
244 + outb(PIT_TICKS_50mS >> 8, 0x42);
245 + while ((inb(0x61) & 0x20) == 0);
246 count--;
247 }
248 }