# HG changeset patch # User Antoine Bodin # Date 1300155863 -3600 # Node ID bfe7a13898593cefccb3ec6b7c0d1db8ea842a1c # Parent abe27fd0192d3b43c11bebbb165abf1781570874 Add: linux-libre 2.6.37-libre (part 2) diff -r abe27fd0192d -r bfe7a1389859 linux-libre/stuff/001-squashfs-decompressors-add-xz-decompressor-module.patch --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/linux-libre/stuff/001-squashfs-decompressors-add-xz-decompressor-module.patch Tue Mar 15 03:24:23 2011 +0100 @@ -0,0 +1,3934 @@ +From: Lasse Collin +Date: Thu, 2 Dec 2010 19:14:19 +0000 (+0200) +Subject: Decompressors: Add XZ decompressor module +X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Fpkl%2Fsquashfs-xz.git;a=commitdiff_plain;h=3dbc3fe7878e53b43064a12d4ab31ca4c18ce85f + +Decompressors: Add XZ decompressor module + +In userspace, the .lzma format has become mostly a legacy +file format that got superseded by the .xz format. Similarly, +LZMA Utils was superseded by XZ Utils. + +These patches add support for XZ decompression into +the kernel. Most of the code is as is from XZ Embedded +. It was written for +the Linux kernel but is usable in other projects too. + +Advantages of XZ over the current LZMA code in the kernel: + - Nice API that can be used by other kernel modules; it's + not limited to kernel, initramfs, and initrd decompression. + - Integrity check support (CRC32) + - BCJ filters improve compression of executable code on + certain architectures. These together with LZMA2 can + produce a few percent smaller kernel or Squashfs images + than plain LZMA without making the decompression slower. + +This patch: Add the main decompression code (xz_dec), testing +module (xz_dec_test), wrapper script (xz_wrap.sh) for the xz +command line tool, and documentation. The xz_dec module is +enough to have a usable XZ decompressor e.g. for Squashfs. + +Signed-off-by: Lasse Collin +--- + +diff --git a/Documentation/xz.txt b/Documentation/xz.txt +new file mode 100644 +index 0000000..68329ac +--- /dev/null ++++ b/Documentation/xz.txt +@@ -0,0 +1,122 @@ ++ ++XZ data compression in Linux ++============================ ++ ++Introduction ++ ++ XZ is a general purpose data compression format with high compression ++ ratio and relatively fast decompression. The primary compression ++ algorithm (filter) is LZMA2. Additional filters can be used to improve ++ compression ratio even further. E.g. Branch/Call/Jump (BCJ) filters ++ improve compression ratio of executable data. ++ ++ The XZ decompressor in Linux is called XZ Embedded. It supports ++ the LZMA2 filter and optionally also BCJ filters. CRC32 is supported ++ for integrity checking. The home page of XZ Embedded is at ++ , where you can find the ++ latest version and also information about using the code outside ++ the Linux kernel. ++ ++ For userspace, XZ Utils provide a zlib-like compression library ++ and a gzip-like command line tool. XZ Utils can be downloaded from ++ . ++ ++XZ related components in the kernel ++ ++ The xz_dec module provides XZ decompressor with single-call (buffer ++ to buffer) and multi-call (stateful) APIs. The usage of the xz_dec ++ module is documented in include/linux/xz.h. ++ ++ The xz_dec_test module is for testing xz_dec. xz_dec_test is not ++ useful unless you are hacking the XZ decompressor. xz_dec_test ++ allocates a char device major dynamically to which one can write ++ .xz files from userspace. The decompressed output is thrown away. ++ Keep an eye on dmesg to see diagnostics printed by xz_dec_test. ++ See the xz_dec_test source code for the details. ++ ++ For decompressing the kernel image, initramfs, and initrd, there ++ is a wrapper function in lib/decompress_unxz.c. Its API is the ++ same as in other decompress_*.c files, which is defined in ++ include/linux/decompress/generic.h. ++ ++ scripts/xz_wrap.sh is a wrapper for the xz command line tool found ++ from XZ Utils. The wrapper sets compression options to values suitable ++ for compressing the kernel image. ++ ++ For kernel makefiles, two commands are provided for use with ++ $(call if_needed). The kernel image should be compressed with ++ $(call if_needed,xzkern) which will use a BCJ filter and a big LZMA2 ++ dictionary. It will also append a four-byte trailer containing the ++ uncompressed size of the file, which is needed by the boot code. ++ Other things should be compressed with $(call if_needed,xzmisc) ++ which will use no BCJ filter and 1 MiB LZMA2 dictionary. ++ ++Notes on compression options ++ ++ Since the XZ Embedded supports only streams with no integrity check or ++ CRC32, make sure that you don't use some other integrity check type ++ when encoding files that are supposed to be decoded by the kernel. With ++ liblzma, you need to use either LZMA_CHECK_NONE or LZMA_CHECK_CRC32 ++ when encoding. With the xz command line tool, use --check=none or ++ --check=crc32. ++ ++ Using CRC32 is strongly recommended unless there is some other layer ++ which will verify the integrity of the uncompressed data anyway. ++ Double checking the integrity would probably be waste of CPU cycles. ++ Note that the headers will always have a CRC32 which will be validated ++ by the decoder; you can only change the integrity check type (or ++ disable it) for the actual uncompressed data. ++ ++ In userspace, LZMA2 is typically used with dictionary sizes of several ++ megabytes. The decoder needs to have the dictionary in RAM, thus big ++ dictionaries cannot be used for files that are intended to be decoded ++ by the kernel. 1 MiB is probably the maximum reasonable dictionary ++ size for in-kernel use (maybe more is OK for initramfs). The presets ++ in XZ Utils may not be optimal when creating files for the kernel, ++ so don't hesitate to use custom settings. Example: ++ ++ xz --check=crc32 --lzma2=dict=512KiB inputfile ++ ++ An exception to above dictionary size limitation is when the decoder ++ is used in single-call mode. Decompressing the kernel itself is an ++ example of this situation. In single-call mode, the memory usage ++ doesn't depend on the dictionary size, and it is perfectly fine to ++ use a big dictionary: for maximum compression, the dictionary should ++ be at least as big as the uncompressed data itself. ++ ++Future plans ++ ++ Creating a limited XZ encoder may be considered if people think it is ++ useful. LZMA2 is slower to compress than e.g. Deflate or LZO even at ++ the fastest settings, so it isn't clear if LZMA2 encoder is wanted ++ into the kernel. ++ ++ Support for limited random-access reading is planned for the ++ decompression code. I don't know if it could have any use in the ++ kernel, but I know that it would be useful in some embedded projects ++ outside the Linux kernel. ++ ++Conformance to the .xz file format specification ++ ++ There are a couple of corner cases where things have been simplified ++ at expense of detecting errors as early as possible. These should not ++ matter in practice all, since they don't cause security issues. But ++ it is good to know this if testing the code e.g. with the test files ++ from XZ Utils. ++ ++Reporting bugs ++ ++ Before reporting a bug, please check that it's not fixed already ++ at upstream. See to get the ++ latest code. ++ ++ Report bugs to or visit #tukaani on ++ Freenode and talk to Larhzu. I don't actively read LKML or other ++ kernel-related mailing lists, so if there's something I should know, ++ you should email to me personally or use IRC. ++ ++ Don't bother Igor Pavlov with questions about the XZ implementation ++ in the kernel or about XZ Utils. While these two implementations ++ include essential code that is directly based on Igor Pavlov's code, ++ these implementations aren't maintained nor supported by him. ++ +diff --git a/include/linux/xz.h b/include/linux/xz.h +new file mode 100644 +index 0000000..64cffa6 +--- /dev/null ++++ b/include/linux/xz.h +@@ -0,0 +1,264 @@ ++/* ++ * XZ decompressor ++ * ++ * Authors: Lasse Collin ++ * Igor Pavlov ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#ifndef XZ_H ++#define XZ_H ++ ++#ifdef __KERNEL__ ++# include ++# include ++#else ++# include ++# include ++#endif ++ ++/* In Linux, this is used to make extern functions static when needed. */ ++#ifndef XZ_EXTERN ++# define XZ_EXTERN extern ++#endif ++ ++/** ++ * enum xz_mode - Operation mode ++ * ++ * @XZ_SINGLE: Single-call mode. This uses less RAM than ++ * than multi-call modes, because the LZMA2 ++ * dictionary doesn't need to be allocated as ++ * part of the decoder state. All required data ++ * structures are allocated at initialization, ++ * so xz_dec_run() cannot return XZ_MEM_ERROR. ++ * @XZ_PREALLOC: Multi-call mode with preallocated LZMA2 ++ * dictionary buffer. All data structures are ++ * allocated at initialization, so xz_dec_run() ++ * cannot return XZ_MEM_ERROR. ++ * @XZ_DYNALLOC: Multi-call mode. The LZMA2 dictionary is ++ * allocated once the required size has been ++ * parsed from the stream headers. If the ++ * allocation fails, xz_dec_run() will return ++ * XZ_MEM_ERROR. ++ * ++ * It is possible to enable support only for a subset of the above ++ * modes at compile time by defining XZ_DEC_SINGLE, XZ_DEC_PREALLOC, ++ * or XZ_DEC_DYNALLOC. The xz_dec kernel module is always compiled ++ * with support for all operation modes, but the preboot code may ++ * be built with fewer features to minimize code size. ++ */ ++enum xz_mode { ++ XZ_SINGLE, ++ XZ_PREALLOC, ++ XZ_DYNALLOC ++}; ++ ++/** ++ * enum xz_ret - Return codes ++ * @XZ_OK: Everything is OK so far. More input or more ++ * output space is required to continue. This ++ * return code is possible only in multi-call mode ++ * (XZ_PREALLOC or XZ_DYNALLOC). ++ * @XZ_STREAM_END: Operation finished successfully. ++ * @XZ_UNSUPPORTED_CHECK: Integrity check type is not supported. Decoding ++ * is still possible in multi-call mode by simply ++ * calling xz_dec_run() again. ++ * Note that this return value is used only if ++ * XZ_DEC_ANY_CHECK was defined at build time, ++ * which is not used in the kernel. Unsupported ++ * check types return XZ_OPTIONS_ERROR if ++ * XZ_DEC_ANY_CHECK was not defined at build time. ++ * @XZ_MEM_ERROR: Allocating memory failed. This return code is ++ * possible only if the decoder was initialized ++ * with XZ_DYNALLOC. The amount of memory that was ++ * tried to be allocated was no more than the ++ * dict_max argument given to xz_dec_init(). ++ * @XZ_MEMLIMIT_ERROR: A bigger LZMA2 dictionary would be needed than ++ * allowed by the dict_max argument given to ++ * xz_dec_init(). This return value is possible ++ * only in multi-call mode (XZ_PREALLOC or ++ * XZ_DYNALLOC); the single-call mode (XZ_SINGLE) ++ * ignores the dict_max argument. ++ * @XZ_FORMAT_ERROR: File format was not recognized (wrong magic ++ * bytes). ++ * @XZ_OPTIONS_ERROR: This implementation doesn't support the requested ++ * compression options. In the decoder this means ++ * that the header CRC32 matches, but the header ++ * itself specifies something that we don't support. ++ * @XZ_DATA_ERROR: Compressed data is corrupt. ++ * @XZ_BUF_ERROR: Cannot make any progress. Details are slightly ++ * different between multi-call and single-call ++ * mode; more information below. ++ * ++ * In multi-call mode, XZ_BUF_ERROR is returned when two consecutive calls ++ * to XZ code cannot consume any input and cannot produce any new output. ++ * This happens when there is no new input available, or the output buffer ++ * is full while at least one output byte is still pending. Assuming your ++ * code is not buggy, you can get this error only when decoding a compressed ++ * stream that is truncated or otherwise corrupt. ++ * ++ * In single-call mode, XZ_BUF_ERROR is returned only when the output buffer ++ * is too small or the compressed input is corrupt in a way that makes the ++ * decoder produce more output than the caller expected. When it is ++ * (relatively) clear that the compressed input is truncated, XZ_DATA_ERROR ++ * is used instead of XZ_BUF_ERROR. ++ */ ++enum xz_ret { ++ XZ_OK, ++ XZ_STREAM_END, ++ XZ_UNSUPPORTED_CHECK, ++ XZ_MEM_ERROR, ++ XZ_MEMLIMIT_ERROR, ++ XZ_FORMAT_ERROR, ++ XZ_OPTIONS_ERROR, ++ XZ_DATA_ERROR, ++ XZ_BUF_ERROR ++}; ++ ++/** ++ * struct xz_buf - Passing input and output buffers to XZ code ++ * @in: Beginning of the input buffer. This may be NULL if and only ++ * if in_pos is equal to in_size. ++ * @in_pos: Current position in the input buffer. This must not exceed ++ * in_size. ++ * @in_size: Size of the input buffer ++ * @out: Beginning of the output buffer. This may be NULL if and only ++ * if out_pos is equal to out_size. ++ * @out_pos: Current position in the output buffer. This must not exceed ++ * out_size. ++ * @out_size: Size of the output buffer ++ * ++ * Only the contents of the output buffer from out[out_pos] onward, and ++ * the variables in_pos and out_pos are modified by the XZ code. ++ */ ++struct xz_buf { ++ const uint8_t *in; ++ size_t in_pos; ++ size_t in_size; ++ ++ uint8_t *out; ++ size_t out_pos; ++ size_t out_size; ++}; ++ ++/** ++ * struct xz_dec - Opaque type to hold the XZ decoder state ++ */ ++struct xz_dec; ++ ++/** ++ * xz_dec_init() - Allocate and initialize a XZ decoder state ++ * @mode: Operation mode ++ * @dict_max: Maximum size of the LZMA2 dictionary (history buffer) for ++ * multi-call decoding. This is ignored in single-call mode ++ * (mode == XZ_SINGLE). LZMA2 dictionary is always 2^n bytes ++ * or 2^n + 2^(n-1) bytes (the latter sizes are less common ++ * in practice), so other values for dict_max don't make sense. ++ * In the kernel, dictionary sizes of 64 KiB, 128 KiB, 256 KiB, ++ * 512 KiB, and 1 MiB are probably the only reasonable values, ++ * except for kernel and initramfs images where a bigger ++ * dictionary can be fine and useful. ++ * ++ * Single-call mode (XZ_SINGLE): xz_dec_run() decodes the whole stream at ++ * once. The caller must provide enough output space or the decoding will ++ * fail. The output space is used as the dictionary buffer, which is why ++ * there is no need to allocate the dictionary as part of the decoder's ++ * internal state. ++ * ++ * Because the output buffer is used as the workspace, streams encoded using ++ * a big dictionary are not a problem in single-call mode. It is enough that ++ * the output buffer is big enough to hold the actual uncompressed data; it ++ * can be smaller than the dictionary size stored in the stream headers. ++ * ++ * Multi-call mode with preallocated dictionary (XZ_PREALLOC): dict_max bytes ++ * of memory is preallocated for the LZMA2 dictionary. This way there is no ++ * risk that xz_dec_run() could run out of memory, since xz_dec_run() will ++ * never allocate any memory. Instead, if the preallocated dictionary is too ++ * small for decoding the given input stream, xz_dec_run() will return ++ * XZ_MEMLIMIT_ERROR. Thus, it is important to know what kind of data will be ++ * decoded to avoid allocating excessive amount of memory for the dictionary. ++ * ++ * Multi-call mode with dynamically allocated dictionary (XZ_DYNALLOC): ++ * dict_max specifies the maximum allowed dictionary size that xz_dec_run() ++ * may allocate once it has parsed the dictionary size from the stream ++ * headers. This way excessive allocations can be avoided while still ++ * limiting the maximum memory usage to a sane value to prevent running the ++ * system out of memory when decompressing streams from untrusted sources. ++ * ++ * On success, xz_dec_init() returns a pointer to struct xz_dec, which is ++ * ready to be used with xz_dec_run(). If memory allocation fails, ++ * xz_dec_init() returns NULL. ++ */ ++XZ_EXTERN struct xz_dec *xz_dec_init(enum xz_mode mode, uint32_t dict_max); ++ ++/** ++ * xz_dec_run() - Run the XZ decoder ++ * @s: Decoder state allocated using xz_dec_init() ++ * @b: Input and output buffers ++ * ++ * The possible return values depend on build options and operation mode. ++ * See enum xz_ret for details. ++ * ++ * Note that if an error occurs in single-call mode (return value is not ++ * XZ_STREAM_END), b->in_pos and b->out_pos are not modified and the ++ * contents of the output buffer from b->out[b->out_pos] onward are ++ * undefined. This is true even after XZ_BUF_ERROR, because with some filter ++ * chains, there may be a second pass over the output buffer, and this pass ++ * cannot be properly done if the output buffer is truncated. Thus, you ++ * cannot give the single-call decoder a too small buffer and then expect to ++ * get that amount valid data from the beginning of the stream. You must use ++ * the multi-call decoder if you don't want to uncompress the whole stream. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_run(struct xz_dec *s, struct xz_buf *b); ++ ++/** ++ * xz_dec_reset() - Reset an already allocated decoder state ++ * @s: Decoder state allocated using xz_dec_init() ++ * ++ * This function can be used to reset the multi-call decoder state without ++ * freeing and reallocating memory with xz_dec_end() and xz_dec_init(). ++ * ++ * In single-call mode, xz_dec_reset() is always called in the beginning of ++ * xz_dec_run(). Thus, explicit call to xz_dec_reset() is useful only in ++ * multi-call mode. ++ */ ++XZ_EXTERN void xz_dec_reset(struct xz_dec *s); ++ ++/** ++ * xz_dec_end() - Free the memory allocated for the decoder state ++ * @s: Decoder state allocated using xz_dec_init(). If s is NULL, ++ * this function does nothing. ++ */ ++XZ_EXTERN void xz_dec_end(struct xz_dec *s); ++ ++/* ++ * Standalone build (userspace build or in-kernel build for boot time use) ++ * needs a CRC32 implementation. For normal in-kernel use, kernel's own ++ * CRC32 module is used instead, and users of this module don't need to ++ * care about the functions below. ++ */ ++#ifndef XZ_INTERNAL_CRC32 ++# ifdef __KERNEL__ ++# define XZ_INTERNAL_CRC32 0 ++# else ++# define XZ_INTERNAL_CRC32 1 ++# endif ++#endif ++ ++#if XZ_INTERNAL_CRC32 ++/* ++ * This must be called before any other xz_* function to initialize ++ * the CRC32 lookup table. ++ */ ++XZ_EXTERN void xz_crc32_init(void); ++ ++/* ++ * Update CRC32 value using the polynomial from IEEE-802.3. To start a new ++ * calculation, the third argument must be zero. To continue the calculation, ++ * the previously returned value is passed as the third argument. ++ */ ++XZ_EXTERN uint32_t xz_crc32(const uint8_t *buf, size_t size, uint32_t crc); ++#endif ++#endif +diff --git a/lib/Kconfig b/lib/Kconfig +index fa9bf2c..6090314 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -106,6 +106,8 @@ config LZO_COMPRESS + config LZO_DECOMPRESS + tristate + ++source "lib/xz/Kconfig" ++ + # + # These all provide a common interface (hence the apparent duplication with + # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) +diff --git a/lib/Makefile b/lib/Makefile +index e6a3763..f2f98dd 100644 +--- a/lib/Makefile ++++ b/lib/Makefile +@@ -69,6 +69,7 @@ obj-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate/ + obj-$(CONFIG_REED_SOLOMON) += reed_solomon/ + obj-$(CONFIG_LZO_COMPRESS) += lzo/ + obj-$(CONFIG_LZO_DECOMPRESS) += lzo/ ++obj-$(CONFIG_XZ_DEC) += xz/ + obj-$(CONFIG_RAID6_PQ) += raid6/ + + lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o +diff --git a/lib/xz/Kconfig b/lib/xz/Kconfig +new file mode 100644 +index 0000000..e3b6e18 +--- /dev/null ++++ b/lib/xz/Kconfig +@@ -0,0 +1,59 @@ ++config XZ_DEC ++ tristate "XZ decompression support" ++ select CRC32 ++ help ++ LZMA2 compression algorithm and BCJ filters are supported using ++ the .xz file format as the container. For integrity checking, ++ CRC32 is supported. See Documentation/xz.txt for more information. ++ ++config XZ_DEC_X86 ++ bool "x86 BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_POWERPC ++ bool "PowerPC BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_IA64 ++ bool "IA-64 BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_ARM ++ bool "ARM BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_ARMTHUMB ++ bool "ARM-Thumb BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_SPARC ++ bool "SPARC BCJ filter decoder" if EMBEDDED ++ default y ++ depends on XZ_DEC ++ select XZ_DEC_BCJ ++ ++config XZ_DEC_BCJ ++ bool ++ default n ++ ++config XZ_DEC_TEST ++ tristate "XZ decompressor tester" ++ default n ++ depends on XZ_DEC ++ help ++ This allows passing .xz files to the in-kernel XZ decoder via ++ a character special file. It calculates CRC32 of the decompressed ++ data and writes diagnostics to the system log. ++ ++ Unless you are developing the XZ decoder, you don't need this ++ and should say N. +diff --git a/lib/xz/Makefile b/lib/xz/Makefile +new file mode 100644 +index 0000000..a7fa769 +--- /dev/null ++++ b/lib/xz/Makefile +@@ -0,0 +1,5 @@ ++obj-$(CONFIG_XZ_DEC) += xz_dec.o ++xz_dec-y := xz_dec_syms.o xz_dec_stream.o xz_dec_lzma2.o ++xz_dec-$(CONFIG_XZ_DEC_BCJ) += xz_dec_bcj.o ++ ++obj-$(CONFIG_XZ_DEC_TEST) += xz_dec_test.o +diff --git a/lib/xz/xz_crc32.c b/lib/xz/xz_crc32.c +new file mode 100644 +index 0000000..34532d1 +--- /dev/null ++++ b/lib/xz/xz_crc32.c +@@ -0,0 +1,59 @@ ++/* ++ * CRC32 using the polynomial from IEEE-802.3 ++ * ++ * Authors: Lasse Collin ++ * Igor Pavlov ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++/* ++ * This is not the fastest implementation, but it is pretty compact. ++ * The fastest versions of xz_crc32() on modern CPUs without hardware ++ * accelerated CRC instruction are 3-5 times as fast as this version, ++ * but they are bigger and use more memory for the lookup table. ++ */ ++ ++#include "xz_private.h" ++ ++/* ++ * STATIC_RW_DATA is used in the pre-boot environment on some architectures. ++ * See for details. ++ */ ++#ifndef STATIC_RW_DATA ++# define STATIC_RW_DATA static ++#endif ++ ++STATIC_RW_DATA uint32_t xz_crc32_table[256]; ++ ++XZ_EXTERN void xz_crc32_init(void) ++{ ++ const uint32_t poly = 0xEDB88320; ++ ++ uint32_t i; ++ uint32_t j; ++ uint32_t r; ++ ++ for (i = 0; i < 256; ++i) { ++ r = i; ++ for (j = 0; j < 8; ++j) ++ r = (r >> 1) ^ (poly & ~((r & 1) - 1)); ++ ++ xz_crc32_table[i] = r; ++ } ++ ++ return; ++} ++ ++XZ_EXTERN uint32_t xz_crc32(const uint8_t *buf, size_t size, uint32_t crc) ++{ ++ crc = ~crc; ++ ++ while (size != 0) { ++ crc = xz_crc32_table[*buf++ ^ (crc & 0xFF)] ^ (crc >> 8); ++ --size; ++ } ++ ++ return ~crc; ++} +diff --git a/lib/xz/xz_dec_bcj.c b/lib/xz/xz_dec_bcj.c +new file mode 100644 +index 0000000..e51e255 +--- /dev/null ++++ b/lib/xz/xz_dec_bcj.c +@@ -0,0 +1,561 @@ ++/* ++ * Branch/Call/Jump (BCJ) filter decoders ++ * ++ * Authors: Lasse Collin ++ * Igor Pavlov ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#include "xz_private.h" ++ ++/* ++ * The rest of the file is inside this ifdef. It makes things a little more ++ * convenient when building without support for any BCJ filters. ++ */ ++#ifdef XZ_DEC_BCJ ++ ++struct xz_dec_bcj { ++ /* Type of the BCJ filter being used */ ++ enum { ++ BCJ_X86 = 4, /* x86 or x86-64 */ ++ BCJ_POWERPC = 5, /* Big endian only */ ++ BCJ_IA64 = 6, /* Big or little endian */ ++ BCJ_ARM = 7, /* Little endian only */ ++ BCJ_ARMTHUMB = 8, /* Little endian only */ ++ BCJ_SPARC = 9 /* Big or little endian */ ++ } type; ++ ++ /* ++ * Return value of the next filter in the chain. We need to preserve ++ * this information across calls, because we must not call the next ++ * filter anymore once it has returned XZ_STREAM_END. ++ */ ++ enum xz_ret ret; ++ ++ /* True if we are operating in single-call mode. */ ++ bool single_call; ++ ++ /* ++ * Absolute position relative to the beginning of the uncompressed ++ * data (in a single .xz Block). We care only about the lowest 32 ++ * bits so this doesn't need to be uint64_t even with big files. ++ */ ++ uint32_t pos; ++ ++ /* x86 filter state */ ++ uint32_t x86_prev_mask; ++ ++ /* Temporary space to hold the variables from struct xz_buf */ ++ uint8_t *out; ++ size_t out_pos; ++ size_t out_size; ++ ++ struct { ++ /* Amount of already filtered data in the beginning of buf */ ++ size_t filtered; ++ ++ /* Total amount of data currently stored in buf */ ++ size_t size; ++ ++ /* ++ * Buffer to hold a mix of filtered and unfiltered data. This ++ * needs to be big enough to hold Alignment + 2 * Look-ahead: ++ * ++ * Type Alignment Look-ahead ++ * x86 1 4 ++ * PowerPC 4 0 ++ * IA-64 16 0 ++ * ARM 4 0 ++ * ARM-Thumb 2 2 ++ * SPARC 4 0 ++ */ ++ uint8_t buf[16]; ++ } temp; ++}; ++ ++#ifdef XZ_DEC_X86 ++/* ++ * This is used to test the most significant byte of a memory address ++ * in an x86 instruction. ++ */ ++static inline int bcj_x86_test_msbyte(uint8_t b) ++{ ++ return b == 0x00 || b == 0xFF; ++} ++ ++static size_t bcj_x86(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ static const bool mask_to_allowed_status[8] ++ = { true, true, true, false, true, false, false, false }; ++ ++ static const uint8_t mask_to_bit_num[8] = { 0, 1, 2, 2, 3, 3, 3, 3 }; ++ ++ size_t i; ++ size_t prev_pos = (size_t)-1; ++ uint32_t prev_mask = s->x86_prev_mask; ++ uint32_t src; ++ uint32_t dest; ++ uint32_t j; ++ uint8_t b; ++ ++ if (size <= 4) ++ return 0; ++ ++ size -= 4; ++ for (i = 0; i < size; ++i) { ++ if ((buf[i] & 0xFE) != 0xE8) ++ continue; ++ ++ prev_pos = i - prev_pos; ++ if (prev_pos > 3) { ++ prev_mask = 0; ++ } else { ++ prev_mask = (prev_mask << (prev_pos - 1)) & 7; ++ if (prev_mask != 0) { ++ b = buf[i + 4 - mask_to_bit_num[prev_mask]]; ++ if (!mask_to_allowed_status[prev_mask] ++ || bcj_x86_test_msbyte(b)) { ++ prev_pos = i; ++ prev_mask = (prev_mask << 1) | 1; ++ continue; ++ } ++ } ++ } ++ ++ prev_pos = i; ++ ++ if (bcj_x86_test_msbyte(buf[i + 4])) { ++ src = get_unaligned_le32(buf + i + 1); ++ while (true) { ++ dest = src - (s->pos + (uint32_t)i + 5); ++ if (prev_mask == 0) ++ break; ++ ++ j = mask_to_bit_num[prev_mask] * 8; ++ b = (uint8_t)(dest >> (24 - j)); ++ if (!bcj_x86_test_msbyte(b)) ++ break; ++ ++ src = dest ^ (((uint32_t)1 << (32 - j)) - 1); ++ } ++ ++ dest &= 0x01FFFFFF; ++ dest |= (uint32_t)0 - (dest & 0x01000000); ++ put_unaligned_le32(dest, buf + i + 1); ++ i += 4; ++ } else { ++ prev_mask = (prev_mask << 1) | 1; ++ } ++ } ++ ++ prev_pos = i - prev_pos; ++ s->x86_prev_mask = prev_pos > 3 ? 0 : prev_mask << (prev_pos - 1); ++ return i; ++} ++#endif ++ ++#ifdef XZ_DEC_POWERPC ++static size_t bcj_powerpc(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ size_t i; ++ uint32_t instr; ++ ++ for (i = 0; i + 4 <= size; i += 4) { ++ instr = get_unaligned_be32(buf + i); ++ if ((instr & 0xFC000003) == 0x48000001) { ++ instr &= 0x03FFFFFC; ++ instr -= s->pos + (uint32_t)i; ++ instr &= 0x03FFFFFC; ++ instr |= 0x48000001; ++ put_unaligned_be32(instr, buf + i); ++ } ++ } ++ ++ return i; ++} ++#endif ++ ++#ifdef XZ_DEC_IA64 ++static size_t bcj_ia64(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ static const uint8_t branch_table[32] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 0, 0, 0, 0, 0, 0, 0, ++ 4, 4, 6, 6, 0, 0, 7, 7, ++ 4, 4, 0, 0, 4, 4, 0, 0 ++ }; ++ ++ /* ++ * The local variables take a little bit stack space, but it's less ++ * than what LZMA2 decoder takes, so it doesn't make sense to reduce ++ * stack usage here without doing that for the LZMA2 decoder too. ++ */ ++ ++ /* Loop counters */ ++ size_t i; ++ size_t j; ++ ++ /* Instruction slot (0, 1, or 2) in the 128-bit instruction word */ ++ uint32_t slot; ++ ++ /* Bitwise offset of the instruction indicated by slot */ ++ uint32_t bit_pos; ++ ++ /* bit_pos split into byte and bit parts */ ++ uint32_t byte_pos; ++ uint32_t bit_res; ++ ++ /* Address part of an instruction */ ++ uint32_t addr; ++ ++ /* Mask used to detect which instructions to convert */ ++ uint32_t mask; ++ ++ /* 41-bit instruction stored somewhere in the lowest 48 bits */ ++ uint64_t instr; ++ ++ /* Instruction normalized with bit_res for easier manipulation */ ++ uint64_t norm; ++ ++ for (i = 0; i + 16 <= size; i += 16) { ++ mask = branch_table[buf[i] & 0x1F]; ++ for (slot = 0, bit_pos = 5; slot < 3; ++slot, bit_pos += 41) { ++ if (((mask >> slot) & 1) == 0) ++ continue; ++ ++ byte_pos = bit_pos >> 3; ++ bit_res = bit_pos & 7; ++ instr = 0; ++ for (j = 0; j < 6; ++j) ++ instr |= (uint64_t)(buf[i + j + byte_pos]) ++ << (8 * j); ++ ++ norm = instr >> bit_res; ++ ++ if (((norm >> 37) & 0x0F) == 0x05 ++ && ((norm >> 9) & 0x07) == 0) { ++ addr = (norm >> 13) & 0x0FFFFF; ++ addr |= ((uint32_t)(norm >> 36) & 1) << 20; ++ addr <<= 4; ++ addr -= s->pos + (uint32_t)i; ++ addr >>= 4; ++ ++ norm &= ~((uint64_t)0x8FFFFF << 13); ++ norm |= (uint64_t)(addr & 0x0FFFFF) << 13; ++ norm |= (uint64_t)(addr & 0x100000) ++ << (36 - 20); ++ ++ instr &= (1 << bit_res) - 1; ++ instr |= norm << bit_res; ++ ++ for (j = 0; j < 6; j++) ++ buf[i + j + byte_pos] ++ = (uint8_t)(instr >> (8 * j)); ++ } ++ } ++ } ++ ++ return i; ++} ++#endif ++ ++#ifdef XZ_DEC_ARM ++static size_t bcj_arm(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ size_t i; ++ uint32_t addr; ++ ++ for (i = 0; i + 4 <= size; i += 4) { ++ if (buf[i + 3] == 0xEB) { ++ addr = (uint32_t)buf[i] | ((uint32_t)buf[i + 1] << 8) ++ | ((uint32_t)buf[i + 2] << 16); ++ addr <<= 2; ++ addr -= s->pos + (uint32_t)i + 8; ++ addr >>= 2; ++ buf[i] = (uint8_t)addr; ++ buf[i + 1] = (uint8_t)(addr >> 8); ++ buf[i + 2] = (uint8_t)(addr >> 16); ++ } ++ } ++ ++ return i; ++} ++#endif ++ ++#ifdef XZ_DEC_ARMTHUMB ++static size_t bcj_armthumb(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ size_t i; ++ uint32_t addr; ++ ++ for (i = 0; i + 4 <= size; i += 2) { ++ if ((buf[i + 1] & 0xF8) == 0xF0 ++ && (buf[i + 3] & 0xF8) == 0xF8) { ++ addr = (((uint32_t)buf[i + 1] & 0x07) << 19) ++ | ((uint32_t)buf[i] << 11) ++ | (((uint32_t)buf[i + 3] & 0x07) << 8) ++ | (uint32_t)buf[i + 2]; ++ addr <<= 1; ++ addr -= s->pos + (uint32_t)i + 4; ++ addr >>= 1; ++ buf[i + 1] = (uint8_t)(0xF0 | ((addr >> 19) & 0x07)); ++ buf[i] = (uint8_t)(addr >> 11); ++ buf[i + 3] = (uint8_t)(0xF8 | ((addr >> 8) & 0x07)); ++ buf[i + 2] = (uint8_t)addr; ++ i += 2; ++ } ++ } ++ ++ return i; ++} ++#endif ++ ++#ifdef XZ_DEC_SPARC ++static size_t bcj_sparc(struct xz_dec_bcj *s, uint8_t *buf, size_t size) ++{ ++ size_t i; ++ uint32_t instr; ++ ++ for (i = 0; i + 4 <= size; i += 4) { ++ instr = get_unaligned_be32(buf + i); ++ if ((instr >> 22) == 0x100 || (instr >> 22) == 0x1FF) { ++ instr <<= 2; ++ instr -= s->pos + (uint32_t)i; ++ instr >>= 2; ++ instr = ((uint32_t)0x40000000 - (instr & 0x400000)) ++ | 0x40000000 | (instr & 0x3FFFFF); ++ put_unaligned_be32(instr, buf + i); ++ } ++ } ++ ++ return i; ++} ++#endif ++ ++/* ++ * Apply the selected BCJ filter. Update *pos and s->pos to match the amount ++ * of data that got filtered. ++ * ++ * NOTE: This is implemented as a switch statement to avoid using function ++ * pointers, which could be problematic in the kernel boot code, which must ++ * avoid pointers to static data (at least on x86). ++ */ ++static void bcj_apply(struct xz_dec_bcj *s, ++ uint8_t *buf, size_t *pos, size_t size) ++{ ++ size_t filtered; ++ ++ buf += *pos; ++ size -= *pos; ++ ++ switch (s->type) { ++#ifdef XZ_DEC_X86 ++ case BCJ_X86: ++ filtered = bcj_x86(s, buf, size); ++ break; ++#endif ++#ifdef XZ_DEC_POWERPC ++ case BCJ_POWERPC: ++ filtered = bcj_powerpc(s, buf, size); ++ break; ++#endif ++#ifdef XZ_DEC_IA64 ++ case BCJ_IA64: ++ filtered = bcj_ia64(s, buf, size); ++ break; ++#endif ++#ifdef XZ_DEC_ARM ++ case BCJ_ARM: ++ filtered = bcj_arm(s, buf, size); ++ break; ++#endif ++#ifdef XZ_DEC_ARMTHUMB ++ case BCJ_ARMTHUMB: ++ filtered = bcj_armthumb(s, buf, size); ++ break; ++#endif ++#ifdef XZ_DEC_SPARC ++ case BCJ_SPARC: ++ filtered = bcj_sparc(s, buf, size); ++ break; ++#endif ++ default: ++ /* Never reached but silence compiler warnings. */ ++ filtered = 0; ++ break; ++ } ++ ++ *pos += filtered; ++ s->pos += filtered; ++} ++ ++/* ++ * Flush pending filtered data from temp to the output buffer. ++ * Move the remaining mixture of possibly filtered and unfiltered ++ * data to the beginning of temp. ++ */ ++static void bcj_flush(struct xz_dec_bcj *s, struct xz_buf *b) ++{ ++ size_t copy_size; ++ ++ copy_size = min_t(size_t, s->temp.filtered, b->out_size - b->out_pos); ++ memcpy(b->out + b->out_pos, s->temp.buf, copy_size); ++ b->out_pos += copy_size; ++ ++ s->temp.filtered -= copy_size; ++ s->temp.size -= copy_size; ++ memmove(s->temp.buf, s->temp.buf + copy_size, s->temp.size); ++} ++ ++/* ++ * The BCJ filter functions are primitive in sense that they process the ++ * data in chunks of 1-16 bytes. To hide this issue, this function does ++ * some buffering. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_bcj_run(struct xz_dec_bcj *s, ++ struct xz_dec_lzma2 *lzma2, ++ struct xz_buf *b) ++{ ++ size_t out_start; ++ ++ /* ++ * Flush pending already filtered data to the output buffer. Return ++ * immediatelly if we couldn't flush everything, or if the next ++ * filter in the chain had already returned XZ_STREAM_END. ++ */ ++ if (s->temp.filtered > 0) { ++ bcj_flush(s, b); ++ if (s->temp.filtered > 0) ++ return XZ_OK; ++ ++ if (s->ret == XZ_STREAM_END) ++ return XZ_STREAM_END; ++ } ++ ++ /* ++ * If we have more output space than what is currently pending in ++ * temp, copy the unfiltered data from temp to the output buffer ++ * and try to fill the output buffer by decoding more data from the ++ * next filter in the chain. Apply the BCJ filter on the new data ++ * in the output buffer. If everything cannot be filtered, copy it ++ * to temp and rewind the output buffer position accordingly. ++ */ ++ if (s->temp.size < b->out_size - b->out_pos) { ++ out_start = b->out_pos; ++ memcpy(b->out + b->out_pos, s->temp.buf, s->temp.size); ++ b->out_pos += s->temp.size; ++ ++ s->ret = xz_dec_lzma2_run(lzma2, b); ++ if (s->ret != XZ_STREAM_END ++ && (s->ret != XZ_OK || s->single_call)) ++ return s->ret; ++ ++ bcj_apply(s, b->out, &out_start, b->out_pos); ++ ++ /* ++ * As an exception, if the next filter returned XZ_STREAM_END, ++ * we can do that too, since the last few bytes that remain ++ * unfiltered are meant to remain unfiltered. ++ */ ++ if (s->ret == XZ_STREAM_END) ++ return XZ_STREAM_END; ++ ++ s->temp.size = b->out_pos - out_start; ++ b->out_pos -= s->temp.size; ++ memcpy(s->temp.buf, b->out + b->out_pos, s->temp.size); ++ } ++ ++ /* ++ * If we have unfiltered data in temp, try to fill by decoding more ++ * data from the next filter. Apply the BCJ filter on temp. Then we ++ * hopefully can fill the actual output buffer by copying filtered ++ * data from temp. A mix of filtered and unfiltered data may be left ++ * in temp; it will be taken care on the next call to this function. ++ */ ++ if (s->temp.size > 0) { ++ /* Make b->out{,_pos,_size} temporarily point to s->temp. */ ++ s->out = b->out; ++ s->out_pos = b->out_pos; ++ s->out_size = b->out_size; ++ b->out = s->temp.buf; ++ b->out_pos = s->temp.size; ++ b->out_size = sizeof(s->temp.buf); ++ ++ s->ret = xz_dec_lzma2_run(lzma2, b); ++ ++ s->temp.size = b->out_pos; ++ b->out = s->out; ++ b->out_pos = s->out_pos; ++ b->out_size = s->out_size; ++ ++ if (s->ret != XZ_OK && s->ret != XZ_STREAM_END) ++ return s->ret; ++ ++ bcj_apply(s, s->temp.buf, &s->temp.filtered, s->temp.size); ++ ++ /* ++ * If the next filter returned XZ_STREAM_END, we mark that ++ * everything is filtered, since the last unfiltered bytes ++ * of the stream are meant to be left as is. ++ */ ++ if (s->ret == XZ_STREAM_END) ++ s->temp.filtered = s->temp.size; ++ ++ bcj_flush(s, b); ++ if (s->temp.filtered > 0) ++ return XZ_OK; ++ } ++ ++ return s->ret; ++} ++ ++XZ_EXTERN struct xz_dec_bcj *xz_dec_bcj_create(bool single_call) ++{ ++ struct xz_dec_bcj *s = kmalloc(sizeof(*s), GFP_KERNEL); ++ if (s != NULL) ++ s->single_call = single_call; ++ ++ return s; ++} ++ ++XZ_EXTERN enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint8_t id) ++{ ++ switch (id) { ++#ifdef XZ_DEC_X86 ++ case BCJ_X86: ++#endif ++#ifdef XZ_DEC_POWERPC ++ case BCJ_POWERPC: ++#endif ++#ifdef XZ_DEC_IA64 ++ case BCJ_IA64: ++#endif ++#ifdef XZ_DEC_ARM ++ case BCJ_ARM: ++#endif ++#ifdef XZ_DEC_ARMTHUMB ++ case BCJ_ARMTHUMB: ++#endif ++#ifdef XZ_DEC_SPARC ++ case BCJ_SPARC: ++#endif ++ break; ++ ++ default: ++ /* Unsupported Filter ID */ ++ return XZ_OPTIONS_ERROR; ++ } ++ ++ s->type = id; ++ s->ret = XZ_OK; ++ s->pos = 0; ++ s->x86_prev_mask = 0; ++ s->temp.filtered = 0; ++ s->temp.size = 0; ++ ++ return XZ_OK; ++} ++ ++#endif +diff --git a/lib/xz/xz_dec_lzma2.c b/lib/xz/xz_dec_lzma2.c +new file mode 100644 +index 0000000..ea5fa4f +--- /dev/null ++++ b/lib/xz/xz_dec_lzma2.c +@@ -0,0 +1,1171 @@ ++/* ++ * LZMA2 decoder ++ * ++ * Authors: Lasse Collin ++ * Igor Pavlov ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#include "xz_private.h" ++#include "xz_lzma2.h" ++ ++/* ++ * Range decoder initialization eats the first five bytes of each LZMA chunk. ++ */ ++#define RC_INIT_BYTES 5 ++ ++/* ++ * Minimum number of usable input buffer to safely decode one LZMA symbol. ++ * The worst case is that we decode 22 bits using probabilities and 26 ++ * direct bits. This may decode at maximum of 20 bytes of input. However, ++ * lzma_main() does an extra normalization before returning, thus we ++ * need to put 21 here. ++ */ ++#define LZMA_IN_REQUIRED 21 ++ ++/* ++ * Dictionary (history buffer) ++ * ++ * These are always true: ++ * start <= pos <= full <= end ++ * pos <= limit <= end ++ * ++ * In multi-call mode, also these are true: ++ * end == size ++ * size <= size_max ++ * allocated <= size ++ * ++ * Most of these variables are size_t to support single-call mode, ++ * in which the dictionary variables address the actual output ++ * buffer directly. ++ */ ++struct dictionary { ++ /* Beginning of the history buffer */ ++ uint8_t *buf; ++ ++ /* Old position in buf (before decoding more data) */ ++ size_t start; ++ ++ /* Position in buf */ ++ size_t pos; ++ ++ /* ++ * How full dictionary is. This is used to detect corrupt input that ++ * would read beyond the beginning of the uncompressed stream. ++ */ ++ size_t full; ++ ++ /* Write limit; we don't write to buf[limit] or later bytes. */ ++ size_t limit; ++ ++ /* ++ * End of the dictionary buffer. In multi-call mode, this is ++ * the same as the dictionary size. In single-call mode, this ++ * indicates the size of the output buffer. ++ */ ++ size_t end; ++ ++ /* ++ * Size of the dictionary as specified in Block Header. This is used ++ * together with "full" to detect corrupt input that would make us ++ * read beyond the beginning of the uncompressed stream. ++ */ ++ uint32_t size; ++ ++ /* ++ * Maximum allowed dictionary size in multi-call mode. ++ * This is ignored in single-call mode. ++ */ ++ uint32_t size_max; ++ ++ /* ++ * Amount of memory currently allocated for the dictionary. ++ * This is used only with XZ_DYNALLOC. (With XZ_PREALLOC, ++ * size_max is always the same as the allocated size.) ++ */ ++ uint32_t allocated; ++ ++ /* Operation mode */ ++ enum xz_mode mode; ++}; ++ ++/* Range decoder */ ++struct rc_dec { ++ uint32_t range; ++ uint32_t code; ++ ++ /* ++ * Number of initializing bytes remaining to be read ++ * by rc_read_init(). ++ */ ++ uint32_t init_bytes_left; ++ ++ /* ++ * Buffer from which we read our input. It can be either ++ * temp.buf or the caller-provided input buffer. ++ */ ++ const uint8_t *in; ++ size_t in_pos; ++ size_t in_limit; ++}; ++ ++/* Probabilities for a length decoder. */ ++struct lzma_len_dec { ++ /* Probability of match length being at least 10 */ ++ uint16_t choice; ++ ++ /* Probability of match length being at least 18 */ ++ uint16_t choice2; ++ ++ /* Probabilities for match lengths 2-9 */ ++ uint16_t low[POS_STATES_MAX][LEN_LOW_SYMBOLS]; ++ ++ /* Probabilities for match lengths 10-17 */ ++ uint16_t mid[POS_STATES_MAX][LEN_MID_SYMBOLS]; ++ ++ /* Probabilities for match lengths 18-273 */ ++ uint16_t high[LEN_HIGH_SYMBOLS]; ++}; ++ ++struct lzma_dec { ++ /* Distances of latest four matches */ ++ uint32_t rep0; ++ uint32_t rep1; ++ uint32_t rep2; ++ uint32_t rep3; ++ ++ /* Types of the most recently seen LZMA symbols */ ++ enum lzma_state state; ++ ++ /* ++ * Length of a match. This is updated so that dict_repeat can ++ * be called again to finish repeating the whole match. ++ */ ++ uint32_t len; ++ ++ /* ++ * LZMA properties or related bit masks (number of literal ++ * context bits, a mask dervied from the number of literal ++ * position bits, and a mask dervied from the number ++ * position bits) ++ */ ++ uint32_t lc; ++ uint32_t literal_pos_mask; /* (1 << lp) - 1 */ ++ uint32_t pos_mask; /* (1 << pb) - 1 */ ++ ++ /* If 1, it's a match. Otherwise it's a single 8-bit literal. */ ++ uint16_t is_match[STATES][POS_STATES_MAX]; ++ ++ /* If 1, it's a repeated match. The distance is one of rep0 .. rep3. */ ++ uint16_t is_rep[STATES]; ++ ++ /* ++ * If 0, distance of a repeated match is rep0. ++ * Otherwise check is_rep1. ++ */ ++ uint16_t is_rep0[STATES]; ++ ++ /* ++ * If 0, distance of a repeated match is rep1. ++ * Otherwise check is_rep2. ++ */ ++ uint16_t is_rep1[STATES]; ++ ++ /* If 0, distance of a repeated match is rep2. Otherwise it is rep3. */ ++ uint16_t is_rep2[STATES]; ++ ++ /* ++ * If 1, the repeated match has length of one byte. Otherwise ++ * the length is decoded from rep_len_decoder. ++ */ ++ uint16_t is_rep0_long[STATES][POS_STATES_MAX]; ++ ++ /* ++ * Probability tree for the highest two bits of the match ++ * distance. There is a separate probability tree for match ++ * lengths of 2 (i.e. MATCH_LEN_MIN), 3, 4, and [5, 273]. ++ */ ++ uint16_t dist_slot[DIST_STATES][DIST_SLOTS]; ++ ++ /* ++ * Probility trees for additional bits for match distance ++ * when the distance is in the range [4, 127]. ++ */ ++ uint16_t dist_special[FULL_DISTANCES - DIST_MODEL_END]; ++ ++ /* ++ * Probability tree for the lowest four bits of a match ++ * distance that is equal to or greater than 128. ++ */ ++ uint16_t dist_align[ALIGN_SIZE]; ++ ++ /* Length of a normal match */ ++ struct lzma_len_dec match_len_dec; ++ ++ /* Length of a repeated match */ ++ struct lzma_len_dec rep_len_dec; ++ ++ /* Probabilities of literals */ ++ uint16_t literal[LITERAL_CODERS_MAX][LITERAL_CODER_SIZE]; ++}; ++ ++struct lzma2_dec { ++ /* Position in xz_dec_lzma2_run(). */ ++ enum lzma2_seq { ++ SEQ_CONTROL, ++ SEQ_UNCOMPRESSED_1, ++ SEQ_UNCOMPRESSED_2, ++ SEQ_COMPRESSED_0, ++ SEQ_COMPRESSED_1, ++ SEQ_PROPERTIES, ++ SEQ_LZMA_PREPARE, ++ SEQ_LZMA_RUN, ++ SEQ_COPY ++ } sequence; ++ ++ /* Next position after decoding the compressed size of the chunk. */ ++ enum lzma2_seq next_sequence; ++ ++ /* Uncompressed size of LZMA chunk (2 MiB at maximum) */ ++ uint32_t uncompressed; ++ ++ /* ++ * Compressed size of LZMA chunk or compressed/uncompressed ++ * size of uncompressed chunk (64 KiB at maximum) ++ */ ++ uint32_t compressed; ++ ++ /* ++ * True if dictionary reset is needed. This is false before ++ * the first chunk (LZMA or uncompressed). ++ */ ++ bool need_dict_reset; ++ ++ /* ++ * True if new LZMA properties are needed. This is false ++ * before the first LZMA chunk. ++ */ ++ bool need_props; ++}; ++ ++struct xz_dec_lzma2 { ++ /* ++ * The order below is important on x86 to reduce code size and ++ * it shouldn't hurt on other platforms. Everything up to and ++ * including lzma.pos_mask are in the first 128 bytes on x86-32, ++ * which allows using smaller instructions to access those ++ * variables. On x86-64, fewer variables fit into the first 128 ++ * bytes, but this is still the best order without sacrificing ++ * the readability by splitting the structures. ++ */ ++ struct rc_dec rc; ++ struct dictionary dict; ++ struct lzma2_dec lzma2; ++ struct lzma_dec lzma; ++ ++ /* ++ * Temporary buffer which holds small number of input bytes between ++ * decoder calls. See lzma2_lzma() for details. ++ */ ++ struct { ++ uint32_t size; ++ uint8_t buf[3 * LZMA_IN_REQUIRED]; ++ } temp; ++}; ++ ++/************** ++ * Dictionary * ++ **************/ ++ ++/* ++ * Reset the dictionary state. When in single-call mode, set up the beginning ++ * of the dictionary to point to the actual output buffer. ++ */ ++static void dict_reset(struct dictionary *dict, struct xz_buf *b) ++{ ++ if (DEC_IS_SINGLE(dict->mode)) { ++ dict->buf = b->out + b->out_pos; ++ dict->end = b->out_size - b->out_pos; ++ } ++ ++ dict->start = 0; ++ dict->pos = 0; ++ dict->limit = 0; ++ dict->full = 0; ++} ++ ++/* Set dictionary write limit */ ++static void dict_limit(struct dictionary *dict, size_t out_max) ++{ ++ if (dict->end - dict->pos <= out_max) ++ dict->limit = dict->end; ++ else ++ dict->limit = dict->pos + out_max; ++} ++ ++/* Return true if at least one byte can be written into the dictionary. */ ++static inline bool dict_has_space(const struct dictionary *dict) ++{ ++ return dict->pos < dict->limit; ++} ++ ++/* ++ * Get a byte from the dictionary at the given distance. The distance is ++ * assumed to valid, or as a special case, zero when the dictionary is ++ * still empty. This special case is needed for single-call decoding to ++ * avoid writing a '\0' to the end of the destination buffer. ++ */ ++static inline uint32_t dict_get(const struct dictionary *dict, uint32_t dist) ++{ ++ size_t offset = dict->pos - dist - 1; ++ ++ if (dist >= dict->pos) ++ offset += dict->end; ++ ++ return dict->full > 0 ? dict->buf[offset] : 0; ++} ++ ++/* ++ * Put one byte into the dictionary. It is assumed that there is space for it. ++ */ ++static inline void dict_put(struct dictionary *dict, uint8_t byte) ++{ ++ dict->buf[dict->pos++] = byte; ++ ++ if (dict->full < dict->pos) ++ dict->full = dict->pos; ++} ++ ++/* ++ * Repeat given number of bytes from the given distance. If the distance is ++ * invalid, false is returned. On success, true is returned and *len is ++ * updated to indicate how many bytes were left to be repeated. ++ */ ++static bool dict_repeat(struct dictionary *dict, uint32_t *len, uint32_t dist) ++{ ++ size_t back; ++ uint32_t left; ++ ++ if (dist >= dict->full || dist >= dict->size) ++ return false; ++ ++ left = min_t(size_t, dict->limit - dict->pos, *len); ++ *len -= left; ++ ++ back = dict->pos - dist - 1; ++ if (dist >= dict->pos) ++ back += dict->end; ++ ++ do { ++ dict->buf[dict->pos++] = dict->buf[back++]; ++ if (back == dict->end) ++ back = 0; ++ } while (--left > 0); ++ ++ if (dict->full < dict->pos) ++ dict->full = dict->pos; ++ ++ return true; ++} ++ ++/* Copy uncompressed data as is from input to dictionary and output buffers. */ ++static void dict_uncompressed(struct dictionary *dict, struct xz_buf *b, ++ uint32_t *left) ++{ ++ size_t copy_size; ++ ++ while (*left > 0 && b->in_pos < b->in_size ++ && b->out_pos < b->out_size) { ++ copy_size = min(b->in_size - b->in_pos, ++ b->out_size - b->out_pos); ++ if (copy_size > dict->end - dict->pos) ++ copy_size = dict->end - dict->pos; ++ if (copy_size > *left) ++ copy_size = *left; ++ ++ *left -= copy_size; ++ ++ memcpy(dict->buf + dict->pos, b->in + b->in_pos, copy_size); ++ dict->pos += copy_size; ++ ++ if (dict->full < dict->pos) ++ dict->full = dict->pos; ++ ++ if (DEC_IS_MULTI(dict->mode)) { ++ if (dict->pos == dict->end) ++ dict->pos = 0; ++ ++ memcpy(b->out + b->out_pos, b->in + b->in_pos, ++ copy_size); ++ } ++ ++ dict->start = dict->pos; ++ ++ b->out_pos += copy_size; ++ b->in_pos += copy_size; ++ } ++} ++ ++/* ++ * Flush pending data from dictionary to b->out. It is assumed that there is ++ * enough space in b->out. This is guaranteed because caller uses dict_limit() ++ * before decoding data into the dictionary. ++ */ ++static uint32_t dict_flush(struct dictionary *dict, struct xz_buf *b) ++{ ++ size_t copy_size = dict->pos - dict->start; ++ ++ if (DEC_IS_MULTI(dict->mode)) { ++ if (dict->pos == dict->end) ++ dict->pos = 0; ++ ++ memcpy(b->out + b->out_pos, dict->buf + dict->start, ++ copy_size); ++ } ++ ++ dict->start = dict->pos; ++ b->out_pos += copy_size; ++ return copy_size; ++} ++ ++/***************** ++ * Range decoder * ++ *****************/ ++ ++/* Reset the range decoder. */ ++static void rc_reset(struct rc_dec *rc) ++{ ++ rc->range = (uint32_t)-1; ++ rc->code = 0; ++ rc->init_bytes_left = RC_INIT_BYTES; ++} ++ ++/* ++ * Read the first five initial bytes into rc->code if they haven't been ++ * read already. (Yes, the first byte gets completely ignored.) ++ */ ++static bool rc_read_init(struct rc_dec *rc, struct xz_buf *b) ++{ ++ while (rc->init_bytes_left > 0) { ++ if (b->in_pos == b->in_size) ++ return false; ++ ++ rc->code = (rc->code << 8) + b->in[b->in_pos++]; ++ --rc->init_bytes_left; ++ } ++ ++ return true; ++} ++ ++/* Return true if there may not be enough input for the next decoding loop. */ ++static inline bool rc_limit_exceeded(const struct rc_dec *rc) ++{ ++ return rc->in_pos > rc->in_limit; ++} ++ ++/* ++ * Return true if it is possible (from point of view of range decoder) that ++ * we have reached the end of the LZMA chunk. ++ */ ++static inline bool rc_is_finished(const struct rc_dec *rc) ++{ ++ return rc->code == 0; ++} ++ ++/* Read the next input byte if needed. */ ++static __always_inline void rc_normalize(struct rc_dec *rc) ++{ ++ if (rc->range < RC_TOP_VALUE) { ++ rc->range <<= RC_SHIFT_BITS; ++ rc->code = (rc->code << RC_SHIFT_BITS) + rc->in[rc->in_pos++]; ++ } ++} ++ ++/* ++ * Decode one bit. In some versions, this function has been splitted in three ++ * functions so that the compiler is supposed to be able to more easily avoid ++ * an extra branch. In this particular version of the LZMA decoder, this ++ * doesn't seem to be a good idea (tested with GCC 3.3.6, 3.4.6, and 4.3.3 ++ * on x86). Using a non-splitted version results in nicer looking code too. ++ * ++ * NOTE: This must return an int. Do not make it return a bool or the speed ++ * of the code generated by GCC 3.x decreases 10-15 %. (GCC 4.3 doesn't care, ++ * and it generates 10-20 % faster code than GCC 3.x from this file anyway.) ++ */ ++static __always_inline int rc_bit(struct rc_dec *rc, uint16_t *prob) ++{ ++ uint32_t bound; ++ int bit; ++ ++ rc_normalize(rc); ++ bound = (rc->range >> RC_BIT_MODEL_TOTAL_BITS) * *prob; ++ if (rc->code < bound) { ++ rc->range = bound; ++ *prob += (RC_BIT_MODEL_TOTAL - *prob) >> RC_MOVE_BITS; ++ bit = 0; ++ } else { ++ rc->range -= bound; ++ rc->code -= bound; ++ *prob -= *prob >> RC_MOVE_BITS; ++ bit = 1; ++ } ++ ++ return bit; ++} ++ ++/* Decode a bittree starting from the most significant bit. */ ++static __always_inline uint32_t rc_bittree(struct rc_dec *rc, ++ uint16_t *probs, uint32_t limit) ++{ ++ uint32_t symbol = 1; ++ ++ do { ++ if (rc_bit(rc, &probs[symbol])) ++ symbol = (symbol << 1) + 1; ++ else ++ symbol <<= 1; ++ } while (symbol < limit); ++ ++ return symbol; ++} ++ ++/* Decode a bittree starting from the least significant bit. */ ++static __always_inline void rc_bittree_reverse(struct rc_dec *rc, ++ uint16_t *probs, ++ uint32_t *dest, uint32_t limit) ++{ ++ uint32_t symbol = 1; ++ uint32_t i = 0; ++ ++ do { ++ if (rc_bit(rc, &probs[symbol])) { ++ symbol = (symbol << 1) + 1; ++ *dest += 1 << i; ++ } else { ++ symbol <<= 1; ++ } ++ } while (++i < limit); ++} ++ ++/* Decode direct bits (fixed fifty-fifty probability) */ ++static inline void rc_direct(struct rc_dec *rc, uint32_t *dest, uint32_t limit) ++{ ++ uint32_t mask; ++ ++ do { ++ rc_normalize(rc); ++ rc->range >>= 1; ++ rc->code -= rc->range; ++ mask = (uint32_t)0 - (rc->code >> 31); ++ rc->code += rc->range & mask; ++ *dest = (*dest << 1) + (mask + 1); ++ } while (--limit > 0); ++} ++ ++/******** ++ * LZMA * ++ ********/ ++ ++/* Get pointer to literal coder probability array. */ ++static uint16_t *lzma_literal_probs(struct xz_dec_lzma2 *s) ++{ ++ uint32_t prev_byte = dict_get(&s->dict, 0); ++ uint32_t low = prev_byte >> (8 - s->lzma.lc); ++ uint32_t high = (s->dict.pos & s->lzma.literal_pos_mask) << s->lzma.lc; ++ return s->lzma.literal[low + high]; ++} ++ ++/* Decode a literal (one 8-bit byte) */ ++static void lzma_literal(struct xz_dec_lzma2 *s) ++{ ++ uint16_t *probs; ++ uint32_t symbol; ++ uint32_t match_byte; ++ uint32_t match_bit; ++ uint32_t offset; ++ uint32_t i; ++ ++ probs = lzma_literal_probs(s); ++ ++ if (lzma_state_is_literal(s->lzma.state)) { ++ symbol = rc_bittree(&s->rc, probs, 0x100); ++ } else { ++ symbol = 1; ++ match_byte = dict_get(&s->dict, s->lzma.rep0) << 1; ++ offset = 0x100; ++ ++ do { ++ match_bit = match_byte & offset; ++ match_byte <<= 1; ++ i = offset + match_bit + symbol; ++ ++ if (rc_bit(&s->rc, &probs[i])) { ++ symbol = (symbol << 1) + 1; ++ offset &= match_bit; ++ } else { ++ symbol <<= 1; ++ offset &= ~match_bit; ++ } ++ } while (symbol < 0x100); ++ } ++ ++ dict_put(&s->dict, (uint8_t)symbol); ++ lzma_state_literal(&s->lzma.state); ++} ++ ++/* Decode the length of the match into s->lzma.len. */ ++static void lzma_len(struct xz_dec_lzma2 *s, struct lzma_len_dec *l, ++ uint32_t pos_state) ++{ ++ uint16_t *probs; ++ uint32_t limit; ++ ++ if (!rc_bit(&s->rc, &l->choice)) { ++ probs = l->low[pos_state]; ++ limit = LEN_LOW_SYMBOLS; ++ s->lzma.len = MATCH_LEN_MIN; ++ } else { ++ if (!rc_bit(&s->rc, &l->choice2)) { ++ probs = l->mid[pos_state]; ++ limit = LEN_MID_SYMBOLS; ++ s->lzma.len = MATCH_LEN_MIN + LEN_LOW_SYMBOLS; ++ } else { ++ probs = l->high; ++ limit = LEN_HIGH_SYMBOLS; ++ s->lzma.len = MATCH_LEN_MIN + LEN_LOW_SYMBOLS ++ + LEN_MID_SYMBOLS; ++ } ++ } ++ ++ s->lzma.len += rc_bittree(&s->rc, probs, limit) - limit; ++} ++ ++/* Decode a match. The distance will be stored in s->lzma.rep0. */ ++static void lzma_match(struct xz_dec_lzma2 *s, uint32_t pos_state) ++{ ++ uint16_t *probs; ++ uint32_t dist_slot; ++ uint32_t limit; ++ ++ lzma_state_match(&s->lzma.state); ++ ++ s->lzma.rep3 = s->lzma.rep2; ++ s->lzma.rep2 = s->lzma.rep1; ++ s->lzma.rep1 = s->lzma.rep0; ++ ++ lzma_len(s, &s->lzma.match_len_dec, pos_state); ++ ++ probs = s->lzma.dist_slot[lzma_get_dist_state(s->lzma.len)]; ++ dist_slot = rc_bittree(&s->rc, probs, DIST_SLOTS) - DIST_SLOTS; ++ ++ if (dist_slot < DIST_MODEL_START) { ++ s->lzma.rep0 = dist_slot; ++ } else { ++ limit = (dist_slot >> 1) - 1; ++ s->lzma.rep0 = 2 + (dist_slot & 1); ++ ++ if (dist_slot < DIST_MODEL_END) { ++ s->lzma.rep0 <<= limit; ++ probs = s->lzma.dist_special + s->lzma.rep0 ++ - dist_slot - 1; ++ rc_bittree_reverse(&s->rc, probs, ++ &s->lzma.rep0, limit); ++ } else { ++ rc_direct(&s->rc, &s->lzma.rep0, limit - ALIGN_BITS); ++ s->lzma.rep0 <<= ALIGN_BITS; ++ rc_bittree_reverse(&s->rc, s->lzma.dist_align, ++ &s->lzma.rep0, ALIGN_BITS); ++ } ++ } ++} ++ ++/* ++ * Decode a repeated match. The distance is one of the four most recently ++ * seen matches. The distance will be stored in s->lzma.rep0. ++ */ ++static void lzma_rep_match(struct xz_dec_lzma2 *s, uint32_t pos_state) ++{ ++ uint32_t tmp; ++ ++ if (!rc_bit(&s->rc, &s->lzma.is_rep0[s->lzma.state])) { ++ if (!rc_bit(&s->rc, &s->lzma.is_rep0_long[ ++ s->lzma.state][pos_state])) { ++ lzma_state_short_rep(&s->lzma.state); ++ s->lzma.len = 1; ++ return; ++ } ++ } else { ++ if (!rc_bit(&s->rc, &s->lzma.is_rep1[s->lzma.state])) { ++ tmp = s->lzma.rep1; ++ } else { ++ if (!rc_bit(&s->rc, &s->lzma.is_rep2[s->lzma.state])) { ++ tmp = s->lzma.rep2; ++ } else { ++ tmp = s->lzma.rep3; ++ s->lzma.rep3 = s->lzma.rep2; ++ } ++ ++ s->lzma.rep2 = s->lzma.rep1; ++ } ++ ++ s->lzma.rep1 = s->lzma.rep0; ++ s->lzma.rep0 = tmp; ++ } ++ ++ lzma_state_long_rep(&s->lzma.state); ++ lzma_len(s, &s->lzma.rep_len_dec, pos_state); ++} ++ ++/* LZMA decoder core */ ++static bool lzma_main(struct xz_dec_lzma2 *s) ++{ ++ uint32_t pos_state; ++ ++ /* ++ * If the dictionary was reached during the previous call, try to ++ * finish the possibly pending repeat in the dictionary. ++ */ ++ if (dict_has_space(&s->dict) && s->lzma.len > 0) ++ dict_repeat(&s->dict, &s->lzma.len, s->lzma.rep0); ++ ++ /* ++ * Decode more LZMA symbols. One iteration may consume up to ++ * LZMA_IN_REQUIRED - 1 bytes. ++ */ ++ while (dict_has_space(&s->dict) && !rc_limit_exceeded(&s->rc)) { ++ pos_state = s->dict.pos & s->lzma.pos_mask; ++ ++ if (!rc_bit(&s->rc, &s->lzma.is_match[ ++ s->lzma.state][pos_state])) { ++ lzma_literal(s); ++ } else { ++ if (rc_bit(&s->rc, &s->lzma.is_rep[s->lzma.state])) ++ lzma_rep_match(s, pos_state); ++ else ++ lzma_match(s, pos_state); ++ ++ if (!dict_repeat(&s->dict, &s->lzma.len, s->lzma.rep0)) ++ return false; ++ } ++ } ++ ++ /* ++ * Having the range decoder always normalized when we are outside ++ * this function makes it easier to correctly handle end of the chunk. ++ */ ++ rc_normalize(&s->rc); ++ ++ return true; ++} ++ ++/* ++ * Reset the LZMA decoder and range decoder state. Dictionary is nore reset ++ * here, because LZMA state may be reset without resetting the dictionary. ++ */ ++static void lzma_reset(struct xz_dec_lzma2 *s) ++{ ++ uint16_t *probs; ++ size_t i; ++ ++ s->lzma.state = STATE_LIT_LIT; ++ s->lzma.rep0 = 0; ++ s->lzma.rep1 = 0; ++ s->lzma.rep2 = 0; ++ s->lzma.rep3 = 0; ++ ++ /* ++ * All probabilities are initialized to the same value. This hack ++ * makes the code smaller by avoiding a separate loop for each ++ * probability array. ++ * ++ * This could be optimized so that only that part of literal ++ * probabilities that are actually required. In the common case ++ * we would write 12 KiB less. ++ */ ++ probs = s->lzma.is_match[0]; ++ for (i = 0; i < PROBS_TOTAL; ++i) ++ probs[i] = RC_BIT_MODEL_TOTAL / 2; ++ ++ rc_reset(&s->rc); ++} ++ ++/* ++ * Decode and validate LZMA properties (lc/lp/pb) and calculate the bit masks ++ * from the decoded lp and pb values. On success, the LZMA decoder state is ++ * reset and true is returned. ++ */ ++static bool lzma_props(struct xz_dec_lzma2 *s, uint8_t props) ++{ ++ if (props > (4 * 5 + 4) * 9 + 8) ++ return false; ++ ++ s->lzma.pos_mask = 0; ++ while (props >= 9 * 5) { ++ props -= 9 * 5; ++ ++s->lzma.pos_mask; ++ } ++ ++ s->lzma.pos_mask = (1 << s->lzma.pos_mask) - 1; ++ ++ s->lzma.literal_pos_mask = 0; ++ while (props >= 9) { ++ props -= 9; ++ ++s->lzma.literal_pos_mask; ++ } ++ ++ s->lzma.lc = props; ++ ++ if (s->lzma.lc + s->lzma.literal_pos_mask > 4) ++ return false; ++ ++ s->lzma.literal_pos_mask = (1 << s->lzma.literal_pos_mask) - 1; ++ ++ lzma_reset(s); ++ ++ return true; ++} ++ ++/********* ++ * LZMA2 * ++ *********/ ++ ++/* ++ * The LZMA decoder assumes that if the input limit (s->rc.in_limit) hasn't ++ * been exceeded, it is safe to read up to LZMA_IN_REQUIRED bytes. This ++ * wrapper function takes care of making the LZMA decoder's assumption safe. ++ * ++ * As long as there is plenty of input left to be decoded in the current LZMA ++ * chunk, we decode directly from the caller-supplied input buffer until ++ * there's LZMA_IN_REQUIRED bytes left. Those remaining bytes are copied into ++ * s->temp.buf, which (hopefully) gets filled on the next call to this ++ * function. We decode a few bytes from the temporary buffer so that we can ++ * continue decoding from the caller-supplied input buffer again. ++ */ ++static bool lzma2_lzma(struct xz_dec_lzma2 *s, struct xz_buf *b) ++{ ++ size_t in_avail; ++ uint32_t tmp; ++ ++ in_avail = b->in_size - b->in_pos; ++ if (s->temp.size > 0 || s->lzma2.compressed == 0) { ++ tmp = 2 * LZMA_IN_REQUIRED - s->temp.size; ++ if (tmp > s->lzma2.compressed - s->temp.size) ++ tmp = s->lzma2.compressed - s->temp.size; ++ if (tmp > in_avail) ++ tmp = in_avail; ++ ++ memcpy(s->temp.buf + s->temp.size, b->in + b->in_pos, tmp); ++ ++ if (s->temp.size + tmp == s->lzma2.compressed) { ++ memzero(s->temp.buf + s->temp.size + tmp, ++ sizeof(s->temp.buf) ++ - s->temp.size - tmp); ++ s->rc.in_limit = s->temp.size + tmp; ++ } else if (s->temp.size + tmp < LZMA_IN_REQUIRED) { ++ s->temp.size += tmp; ++ b->in_pos += tmp; ++ return true; ++ } else { ++ s->rc.in_limit = s->temp.size + tmp - LZMA_IN_REQUIRED; ++ } ++ ++ s->rc.in = s->temp.buf; ++ s->rc.in_pos = 0; ++ ++ if (!lzma_main(s) || s->rc.in_pos > s->temp.size + tmp) ++ return false; ++ ++ s->lzma2.compressed -= s->rc.in_pos; ++ ++ if (s->rc.in_pos < s->temp.size) { ++ s->temp.size -= s->rc.in_pos; ++ memmove(s->temp.buf, s->temp.buf + s->rc.in_pos, ++ s->temp.size); ++ return true; ++ } ++ ++ b->in_pos += s->rc.in_pos - s->temp.size; ++ s->temp.size = 0; ++ } ++ ++ in_avail = b->in_size - b->in_pos; ++ if (in_avail >= LZMA_IN_REQUIRED) { ++ s->rc.in = b->in; ++ s->rc.in_pos = b->in_pos; ++ ++ if (in_avail >= s->lzma2.compressed + LZMA_IN_REQUIRED) ++ s->rc.in_limit = b->in_pos + s->lzma2.compressed; ++ else ++ s->rc.in_limit = b->in_size - LZMA_IN_REQUIRED; ++ ++ if (!lzma_main(s)) ++ return false; ++ ++ in_avail = s->rc.in_pos - b->in_pos; ++ if (in_avail > s->lzma2.compressed) ++ return false; ++ ++ s->lzma2.compressed -= in_avail; ++ b->in_pos = s->rc.in_pos; ++ } ++ ++ in_avail = b->in_size - b->in_pos; ++ if (in_avail < LZMA_IN_REQUIRED) { ++ if (in_avail > s->lzma2.compressed) ++ in_avail = s->lzma2.compressed; ++ ++ memcpy(s->temp.buf, b->in + b->in_pos, in_avail); ++ s->temp.size = in_avail; ++ b->in_pos += in_avail; ++ } ++ ++ return true; ++} ++ ++/* ++ * Take care of the LZMA2 control layer, and forward the job of actual LZMA ++ * decoding or copying of uncompressed chunks to other functions. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_lzma2_run(struct xz_dec_lzma2 *s, ++ struct xz_buf *b) ++{ ++ uint32_t tmp; ++ ++ while (b->in_pos < b->in_size || s->lzma2.sequence == SEQ_LZMA_RUN) { ++ switch (s->lzma2.sequence) { ++ case SEQ_CONTROL: ++ /* ++ * LZMA2 control byte ++ * ++ * Exact values: ++ * 0x00 End marker ++ * 0x01 Dictionary reset followed by ++ * an uncompressed chunk ++ * 0x02 Uncompressed chunk (no dictionary reset) ++ * ++ * Highest three bits (s->control & 0xE0): ++ * 0xE0 Dictionary reset, new properties and state ++ * reset, followed by LZMA compressed chunk ++ * 0xC0 New properties and state reset, followed ++ * by LZMA compressed chunk (no dictionary ++ * reset) ++ * 0xA0 State reset using old properties, ++ * followed by LZMA compressed chunk (no ++ * dictionary reset) ++ * 0x80 LZMA chunk (no dictionary or state reset) ++ * ++ * For LZMA compressed chunks, the lowest five bits ++ * (s->control & 1F) are the highest bits of the ++ * uncompressed size (bits 16-20). ++ * ++ * A new LZMA2 stream must begin with a dictionary ++ * reset. The first LZMA chunk must set new ++ * properties and reset the LZMA state. ++ * ++ * Values that don't match anything described above ++ * are invalid and we return XZ_DATA_ERROR. ++ */ ++ tmp = b->in[b->in_pos++]; ++ ++ if (tmp >= 0xE0 || tmp == 0x01) { ++ s->lzma2.need_props = true; ++ s->lzma2.need_dict_reset = false; ++ dict_reset(&s->dict, b); ++ } else if (s->lzma2.need_dict_reset) { ++ return XZ_DATA_ERROR; ++ } ++ ++ if (tmp >= 0x80) { ++ s->lzma2.uncompressed = (tmp & 0x1F) << 16; ++ s->lzma2.sequence = SEQ_UNCOMPRESSED_1; ++ ++ if (tmp >= 0xC0) { ++ /* ++ * When there are new properties, ++ * state reset is done at ++ * SEQ_PROPERTIES. ++ */ ++ s->lzma2.need_props = false; ++ s->lzma2.next_sequence ++ = SEQ_PROPERTIES; ++ ++ } else if (s->lzma2.need_props) { ++ return XZ_DATA_ERROR; ++ ++ } else { ++ s->lzma2.next_sequence ++ = SEQ_LZMA_PREPARE; ++ if (tmp >= 0xA0) ++ lzma_reset(s); ++ } ++ } else { ++ if (tmp == 0x00) ++ return XZ_STREAM_END; ++ ++ if (tmp > 0x02) ++ return XZ_DATA_ERROR; ++ ++ s->lzma2.sequence = SEQ_COMPRESSED_0; ++ s->lzma2.next_sequence = SEQ_COPY; ++ } ++ ++ break; ++ ++ case SEQ_UNCOMPRESSED_1: ++ s->lzma2.uncompressed ++ += (uint32_t)b->in[b->in_pos++] << 8; ++ s->lzma2.sequence = SEQ_UNCOMPRESSED_2; ++ break; ++ ++ case SEQ_UNCOMPRESSED_2: ++ s->lzma2.uncompressed ++ += (uint32_t)b->in[b->in_pos++] + 1; ++ s->lzma2.sequence = SEQ_COMPRESSED_0; ++ break; ++ ++ case SEQ_COMPRESSED_0: ++ s->lzma2.compressed ++ = (uint32_t)b->in[b->in_pos++] << 8; ++ s->lzma2.sequence = SEQ_COMPRESSED_1; ++ break; ++ ++ case SEQ_COMPRESSED_1: ++ s->lzma2.compressed ++ += (uint32_t)b->in[b->in_pos++] + 1; ++ s->lzma2.sequence = s->lzma2.next_sequence; ++ break; ++ ++ case SEQ_PROPERTIES: ++ if (!lzma_props(s, b->in[b->in_pos++])) ++ return XZ_DATA_ERROR; ++ ++ s->lzma2.sequence = SEQ_LZMA_PREPARE; ++ ++ case SEQ_LZMA_PREPARE: ++ if (s->lzma2.compressed < RC_INIT_BYTES) ++ return XZ_DATA_ERROR; ++ ++ if (!rc_read_init(&s->rc, b)) ++ return XZ_OK; ++ ++ s->lzma2.compressed -= RC_INIT_BYTES; ++ s->lzma2.sequence = SEQ_LZMA_RUN; ++ ++ case SEQ_LZMA_RUN: ++ /* ++ * Set dictionary limit to indicate how much we want ++ * to be encoded at maximum. Decode new data into the ++ * dictionary. Flush the new data from dictionary to ++ * b->out. Check if we finished decoding this chunk. ++ * In case the dictionary got full but we didn't fill ++ * the output buffer yet, we may run this loop ++ * multiple times without changing s->lzma2.sequence. ++ */ ++ dict_limit(&s->dict, min_t(size_t, ++ b->out_size - b->out_pos, ++ s->lzma2.uncompressed)); ++ if (!lzma2_lzma(s, b)) ++ return XZ_DATA_ERROR; ++ ++ s->lzma2.uncompressed -= dict_flush(&s->dict, b); ++ ++ if (s->lzma2.uncompressed == 0) { ++ if (s->lzma2.compressed > 0 || s->lzma.len > 0 ++ || !rc_is_finished(&s->rc)) ++ return XZ_DATA_ERROR; ++ ++ rc_reset(&s->rc); ++ s->lzma2.sequence = SEQ_CONTROL; ++ ++ } else if (b->out_pos == b->out_size ++ || (b->in_pos == b->in_size ++ && s->temp.size ++ < s->lzma2.compressed)) { ++ return XZ_OK; ++ } ++ ++ break; ++ ++ case SEQ_COPY: ++ dict_uncompressed(&s->dict, b, &s->lzma2.compressed); ++ if (s->lzma2.compressed > 0) ++ return XZ_OK; ++ ++ s->lzma2.sequence = SEQ_CONTROL; ++ break; ++ } ++ } ++ ++ return XZ_OK; ++} ++ ++XZ_EXTERN struct xz_dec_lzma2 *xz_dec_lzma2_create(enum xz_mode mode, ++ uint32_t dict_max) ++{ ++ struct xz_dec_lzma2 *s = kmalloc(sizeof(*s), GFP_KERNEL); ++ if (s == NULL) ++ return NULL; ++ ++ s->dict.mode = mode; ++ s->dict.size_max = dict_max; ++ ++ if (DEC_IS_PREALLOC(mode)) { ++ s->dict.buf = vmalloc(dict_max); ++ if (s->dict.buf == NULL) { ++ kfree(s); ++ return NULL; ++ } ++ } else if (DEC_IS_DYNALLOC(mode)) { ++ s->dict.buf = NULL; ++ s->dict.allocated = 0; ++ } ++ ++ return s; ++} ++ ++XZ_EXTERN enum xz_ret xz_dec_lzma2_reset(struct xz_dec_lzma2 *s, uint8_t props) ++{ ++ /* This limits dictionary size to 3 GiB to keep parsing simpler. */ ++ if (props > 39) ++ return XZ_OPTIONS_ERROR; ++ ++ s->dict.size = 2 + (props & 1); ++ s->dict.size <<= (props >> 1) + 11; ++ ++ if (DEC_IS_MULTI(s->dict.mode)) { ++ if (s->dict.size > s->dict.size_max) ++ return XZ_MEMLIMIT_ERROR; ++ ++ s->dict.end = s->dict.size; ++ ++ if (DEC_IS_DYNALLOC(s->dict.mode)) { ++ if (s->dict.allocated < s->dict.size) { ++ vfree(s->dict.buf); ++ s->dict.buf = vmalloc(s->dict.size); ++ if (s->dict.buf == NULL) { ++ s->dict.allocated = 0; ++ return XZ_MEM_ERROR; ++ } ++ } ++ } ++ } ++ ++ s->lzma.len = 0; ++ ++ s->lzma2.sequence = SEQ_CONTROL; ++ s->lzma2.need_dict_reset = true; ++ ++ s->temp.size = 0; ++ ++ return XZ_OK; ++} ++ ++XZ_EXTERN void xz_dec_lzma2_end(struct xz_dec_lzma2 *s) ++{ ++ if (DEC_IS_MULTI(s->dict.mode)) ++ vfree(s->dict.buf); ++ ++ kfree(s); ++} +diff --git a/lib/xz/xz_dec_stream.c b/lib/xz/xz_dec_stream.c +new file mode 100644 +index 0000000..ac809b1 +--- /dev/null ++++ b/lib/xz/xz_dec_stream.c +@@ -0,0 +1,821 @@ ++/* ++ * .xz Stream decoder ++ * ++ * Author: Lasse Collin ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#include "xz_private.h" ++#include "xz_stream.h" ++ ++/* Hash used to validate the Index field */ ++struct xz_dec_hash { ++ vli_type unpadded; ++ vli_type uncompressed; ++ uint32_t crc32; ++}; ++ ++struct xz_dec { ++ /* Position in dec_main() */ ++ enum { ++ SEQ_STREAM_HEADER, ++ SEQ_BLOCK_START, ++ SEQ_BLOCK_HEADER, ++ SEQ_BLOCK_UNCOMPRESS, ++ SEQ_BLOCK_PADDING, ++ SEQ_BLOCK_CHECK, ++ SEQ_INDEX, ++ SEQ_INDEX_PADDING, ++ SEQ_INDEX_CRC32, ++ SEQ_STREAM_FOOTER ++ } sequence; ++ ++ /* Position in variable-length integers and Check fields */ ++ uint32_t pos; ++ ++ /* Variable-length integer decoded by dec_vli() */ ++ vli_type vli; ++ ++ /* Saved in_pos and out_pos */ ++ size_t in_start; ++ size_t out_start; ++ ++ /* CRC32 value in Block or Index */ ++ uint32_t crc32; ++ ++ /* Type of the integrity check calculated from uncompressed data */ ++ enum xz_check check_type; ++ ++ /* Operation mode */ ++ enum xz_mode mode; ++ ++ /* ++ * True if the next call to xz_dec_run() is allowed to return ++ * XZ_BUF_ERROR. ++ */ ++ bool allow_buf_error; ++ ++ /* Information stored in Block Header */ ++ struct { ++ /* ++ * Value stored in the Compressed Size field, or ++ * VLI_UNKNOWN if Compressed Size is not present. ++ */ ++ vli_type compressed; ++ ++ /* ++ * Value stored in the Uncompressed Size field, or ++ * VLI_UNKNOWN if Uncompressed Size is not present. ++ */ ++ vli_type uncompressed; ++ ++ /* Size of the Block Header field */ ++ uint32_t size; ++ } block_header; ++ ++ /* Information collected when decoding Blocks */ ++ struct { ++ /* Observed compressed size of the current Block */ ++ vli_type compressed; ++ ++ /* Observed uncompressed size of the current Block */ ++ vli_type uncompressed; ++ ++ /* Number of Blocks decoded so far */ ++ vli_type count; ++ ++ /* ++ * Hash calculated from the Block sizes. This is used to ++ * validate the Index field. ++ */ ++ struct xz_dec_hash hash; ++ } block; ++ ++ /* Variables needed when verifying the Index field */ ++ struct { ++ /* Position in dec_index() */ ++ enum { ++ SEQ_INDEX_COUNT, ++ SEQ_INDEX_UNPADDED, ++ SEQ_INDEX_UNCOMPRESSED ++ } sequence; ++ ++ /* Size of the Index in bytes */ ++ vli_type size; ++ ++ /* Number of Records (matches block.count in valid files) */ ++ vli_type count; ++ ++ /* ++ * Hash calculated from the Records (matches block.hash in ++ * valid files). ++ */ ++ struct xz_dec_hash hash; ++ } index; ++ ++ /* ++ * Temporary buffer needed to hold Stream Header, Block Header, ++ * and Stream Footer. The Block Header is the biggest (1 KiB) ++ * so we reserve space according to that. buf[] has to be aligned ++ * to a multiple of four bytes; the size_t variables before it ++ * should guarantee this. ++ */ ++ struct { ++ size_t pos; ++ size_t size; ++ uint8_t buf[1024]; ++ } temp; ++ ++ struct xz_dec_lzma2 *lzma2; ++ ++#ifdef XZ_DEC_BCJ ++ struct xz_dec_bcj *bcj; ++ bool bcj_active; ++#endif ++}; ++ ++#ifdef XZ_DEC_ANY_CHECK ++/* Sizes of the Check field with different Check IDs */ ++static const uint8_t check_sizes[16] = { ++ 0, ++ 4, 4, 4, ++ 8, 8, 8, ++ 16, 16, 16, ++ 32, 32, 32, ++ 64, 64, 64 ++}; ++#endif ++ ++/* ++ * Fill s->temp by copying data starting from b->in[b->in_pos]. Caller ++ * must have set s->temp.pos to indicate how much data we are supposed ++ * to copy into s->temp.buf. Return true once s->temp.pos has reached ++ * s->temp.size. ++ */ ++static bool fill_temp(struct xz_dec *s, struct xz_buf *b) ++{ ++ size_t copy_size = min_t(size_t, ++ b->in_size - b->in_pos, s->temp.size - s->temp.pos); ++ ++ memcpy(s->temp.buf + s->temp.pos, b->in + b->in_pos, copy_size); ++ b->in_pos += copy_size; ++ s->temp.pos += copy_size; ++ ++ if (s->temp.pos == s->temp.size) { ++ s->temp.pos = 0; ++ return true; ++ } ++ ++ return false; ++} ++ ++/* Decode a variable-length integer (little-endian base-128 encoding) */ ++static enum xz_ret dec_vli(struct xz_dec *s, const uint8_t *in, ++ size_t *in_pos, size_t in_size) ++{ ++ uint8_t byte; ++ ++ if (s->pos == 0) ++ s->vli = 0; ++ ++ while (*in_pos < in_size) { ++ byte = in[*in_pos]; ++ ++*in_pos; ++ ++ s->vli |= (vli_type)(byte & 0x7F) << s->pos; ++ ++ if ((byte & 0x80) == 0) { ++ /* Don't allow non-minimal encodings. */ ++ if (byte == 0 && s->pos != 0) ++ return XZ_DATA_ERROR; ++ ++ s->pos = 0; ++ return XZ_STREAM_END; ++ } ++ ++ s->pos += 7; ++ if (s->pos == 7 * VLI_BYTES_MAX) ++ return XZ_DATA_ERROR; ++ } ++ ++ return XZ_OK; ++} ++ ++/* ++ * Decode the Compressed Data field from a Block. Update and validate ++ * the observed compressed and uncompressed sizes of the Block so that ++ * they don't exceed the values possibly stored in the Block Header ++ * (validation assumes that no integer overflow occurs, since vli_type ++ * is normally uint64_t). Update the CRC32 if presence of the CRC32 ++ * field was indicated in Stream Header. ++ * ++ * Once the decoding is finished, validate that the observed sizes match ++ * the sizes possibly stored in the Block Header. Update the hash and ++ * Block count, which are later used to validate the Index field. ++ */ ++static enum xz_ret dec_block(struct xz_dec *s, struct xz_buf *b) ++{ ++ enum xz_ret ret; ++ ++ s->in_start = b->in_pos; ++ s->out_start = b->out_pos; ++ ++#ifdef XZ_DEC_BCJ ++ if (s->bcj_active) ++ ret = xz_dec_bcj_run(s->bcj, s->lzma2, b); ++ else ++#endif ++ ret = xz_dec_lzma2_run(s->lzma2, b); ++ ++ s->block.compressed += b->in_pos - s->in_start; ++ s->block.uncompressed += b->out_pos - s->out_start; ++ ++ /* ++ * There is no need to separately check for VLI_UNKNOWN, since ++ * the observed sizes are always smaller than VLI_UNKNOWN. ++ */ ++ if (s->block.compressed > s->block_header.compressed ++ || s->block.uncompressed ++ > s->block_header.uncompressed) ++ return XZ_DATA_ERROR; ++ ++ if (s->check_type == XZ_CHECK_CRC32) ++ s->crc32 = xz_crc32(b->out + s->out_start, ++ b->out_pos - s->out_start, s->crc32); ++ ++ if (ret == XZ_STREAM_END) { ++ if (s->block_header.compressed != VLI_UNKNOWN ++ && s->block_header.compressed ++ != s->block.compressed) ++ return XZ_DATA_ERROR; ++ ++ if (s->block_header.uncompressed != VLI_UNKNOWN ++ && s->block_header.uncompressed ++ != s->block.uncompressed) ++ return XZ_DATA_ERROR; ++ ++ s->block.hash.unpadded += s->block_header.size ++ + s->block.compressed; ++ ++#ifdef XZ_DEC_ANY_CHECK ++ s->block.hash.unpadded += check_sizes[s->check_type]; ++#else ++ if (s->check_type == XZ_CHECK_CRC32) ++ s->block.hash.unpadded += 4; ++#endif ++ ++ s->block.hash.uncompressed += s->block.uncompressed; ++ s->block.hash.crc32 = xz_crc32( ++ (const uint8_t *)&s->block.hash, ++ sizeof(s->block.hash), s->block.hash.crc32); ++ ++ ++s->block.count; ++ } ++ ++ return ret; ++} ++ ++/* Update the Index size and the CRC32 value. */ ++static void index_update(struct xz_dec *s, const struct xz_buf *b) ++{ ++ size_t in_used = b->in_pos - s->in_start; ++ s->index.size += in_used; ++ s->crc32 = xz_crc32(b->in + s->in_start, in_used, s->crc32); ++} ++ ++/* ++ * Decode the Number of Records, Unpadded Size, and Uncompressed Size ++ * fields from the Index field. That is, Index Padding and CRC32 are not ++ * decoded by this function. ++ * ++ * This can return XZ_OK (more input needed), XZ_STREAM_END (everything ++ * successfully decoded), or XZ_DATA_ERROR (input is corrupt). ++ */ ++static enum xz_ret dec_index(struct xz_dec *s, struct xz_buf *b) ++{ ++ enum xz_ret ret; ++ ++ do { ++ ret = dec_vli(s, b->in, &b->in_pos, b->in_size); ++ if (ret != XZ_STREAM_END) { ++ index_update(s, b); ++ return ret; ++ } ++ ++ switch (s->index.sequence) { ++ case SEQ_INDEX_COUNT: ++ s->index.count = s->vli; ++ ++ /* ++ * Validate that the Number of Records field ++ * indicates the same number of Records as ++ * there were Blocks in the Stream. ++ */ ++ if (s->index.count != s->block.count) ++ return XZ_DATA_ERROR; ++ ++ s->index.sequence = SEQ_INDEX_UNPADDED; ++ break; ++ ++ case SEQ_INDEX_UNPADDED: ++ s->index.hash.unpadded += s->vli; ++ s->index.sequence = SEQ_INDEX_UNCOMPRESSED; ++ break; ++ ++ case SEQ_INDEX_UNCOMPRESSED: ++ s->index.hash.uncompressed += s->vli; ++ s->index.hash.crc32 = xz_crc32( ++ (const uint8_t *)&s->index.hash, ++ sizeof(s->index.hash), ++ s->index.hash.crc32); ++ --s->index.count; ++ s->index.sequence = SEQ_INDEX_UNPADDED; ++ break; ++ } ++ } while (s->index.count > 0); ++ ++ return XZ_STREAM_END; ++} ++ ++/* ++ * Validate that the next four input bytes match the value of s->crc32. ++ * s->pos must be zero when starting to validate the first byte. ++ */ ++static enum xz_ret crc32_validate(struct xz_dec *s, struct xz_buf *b) ++{ ++ do { ++ if (b->in_pos == b->in_size) ++ return XZ_OK; ++ ++ if (((s->crc32 >> s->pos) & 0xFF) != b->in[b->in_pos++]) ++ return XZ_DATA_ERROR; ++ ++ s->pos += 8; ++ ++ } while (s->pos < 32); ++ ++ s->crc32 = 0; ++ s->pos = 0; ++ ++ return XZ_STREAM_END; ++} ++ ++#ifdef XZ_DEC_ANY_CHECK ++/* ++ * Skip over the Check field when the Check ID is not supported. ++ * Returns true once the whole Check field has been skipped over. ++ */ ++static bool check_skip(struct xz_dec *s, struct xz_buf *b) ++{ ++ while (s->pos < check_sizes[s->check_type]) { ++ if (b->in_pos == b->in_size) ++ return false; ++ ++ ++b->in_pos; ++ ++s->pos; ++ } ++ ++ s->pos = 0; ++ ++ return true; ++} ++#endif ++ ++/* Decode the Stream Header field (the first 12 bytes of the .xz Stream). */ ++static enum xz_ret dec_stream_header(struct xz_dec *s) ++{ ++ if (!memeq(s->temp.buf, HEADER_MAGIC, HEADER_MAGIC_SIZE)) ++ return XZ_FORMAT_ERROR; ++ ++ if (xz_crc32(s->temp.buf + HEADER_MAGIC_SIZE, 2, 0) ++ != get_le32(s->temp.buf + HEADER_MAGIC_SIZE + 2)) ++ return XZ_DATA_ERROR; ++ ++ if (s->temp.buf[HEADER_MAGIC_SIZE] != 0) ++ return XZ_OPTIONS_ERROR; ++ ++ /* ++ * Of integrity checks, we support only none (Check ID = 0) and ++ * CRC32 (Check ID = 1). However, if XZ_DEC_ANY_CHECK is defined, ++ * we will accept other check types too, but then the check won't ++ * be verified and a warning (XZ_UNSUPPORTED_CHECK) will be given. ++ */ ++ s->check_type = s->temp.buf[HEADER_MAGIC_SIZE + 1]; ++ ++#ifdef XZ_DEC_ANY_CHECK ++ if (s->check_type > XZ_CHECK_MAX) ++ return XZ_OPTIONS_ERROR; ++ ++ if (s->check_type > XZ_CHECK_CRC32) ++ return XZ_UNSUPPORTED_CHECK; ++#else ++ if (s->check_type > XZ_CHECK_CRC32) ++ return XZ_OPTIONS_ERROR; ++#endif ++ ++ return XZ_OK; ++} ++ ++/* Decode the Stream Footer field (the last 12 bytes of the .xz Stream) */ ++static enum xz_ret dec_stream_footer(struct xz_dec *s) ++{ ++ if (!memeq(s->temp.buf + 10, FOOTER_MAGIC, FOOTER_MAGIC_SIZE)) ++ return XZ_DATA_ERROR; ++ ++ if (xz_crc32(s->temp.buf + 4, 6, 0) != get_le32(s->temp.buf)) ++ return XZ_DATA_ERROR; ++ ++ /* ++ * Validate Backward Size. Note that we never added the size of the ++ * Index CRC32 field to s->index.size, thus we use s->index.size / 4 ++ * instead of s->index.size / 4 - 1. ++ */ ++ if ((s->index.size >> 2) != get_le32(s->temp.buf + 4)) ++ return XZ_DATA_ERROR; ++ ++ if (s->temp.buf[8] != 0 || s->temp.buf[9] != s->check_type) ++ return XZ_DATA_ERROR; ++ ++ /* ++ * Use XZ_STREAM_END instead of XZ_OK to be more convenient ++ * for the caller. ++ */ ++ return XZ_STREAM_END; ++} ++ ++/* Decode the Block Header and initialize the filter chain. */ ++static enum xz_ret dec_block_header(struct xz_dec *s) ++{ ++ enum xz_ret ret; ++ ++ /* ++ * Validate the CRC32. We know that the temp buffer is at least ++ * eight bytes so this is safe. ++ */ ++ s->temp.size -= 4; ++ if (xz_crc32(s->temp.buf, s->temp.size, 0) ++ != get_le32(s->temp.buf + s->temp.size)) ++ return XZ_DATA_ERROR; ++ ++ s->temp.pos = 2; ++ ++ /* ++ * Catch unsupported Block Flags. We support only one or two filters ++ * in the chain, so we catch that with the same test. ++ */ ++#ifdef XZ_DEC_BCJ ++ if (s->temp.buf[1] & 0x3E) ++#else ++ if (s->temp.buf[1] & 0x3F) ++#endif ++ return XZ_OPTIONS_ERROR; ++ ++ /* Compressed Size */ ++ if (s->temp.buf[1] & 0x40) { ++ if (dec_vli(s, s->temp.buf, &s->temp.pos, s->temp.size) ++ != XZ_STREAM_END) ++ return XZ_DATA_ERROR; ++ ++ s->block_header.compressed = s->vli; ++ } else { ++ s->block_header.compressed = VLI_UNKNOWN; ++ } ++ ++ /* Uncompressed Size */ ++ if (s->temp.buf[1] & 0x80) { ++ if (dec_vli(s, s->temp.buf, &s->temp.pos, s->temp.size) ++ != XZ_STREAM_END) ++ return XZ_DATA_ERROR; ++ ++ s->block_header.uncompressed = s->vli; ++ } else { ++ s->block_header.uncompressed = VLI_UNKNOWN; ++ } ++ ++#ifdef XZ_DEC_BCJ ++ /* If there are two filters, the first one must be a BCJ filter. */ ++ s->bcj_active = s->temp.buf[1] & 0x01; ++ if (s->bcj_active) { ++ if (s->temp.size - s->temp.pos < 2) ++ return XZ_OPTIONS_ERROR; ++ ++ ret = xz_dec_bcj_reset(s->bcj, s->temp.buf[s->temp.pos++]); ++ if (ret != XZ_OK) ++ return ret; ++ ++ /* ++ * We don't support custom start offset, ++ * so Size of Properties must be zero. ++ */ ++ if (s->temp.buf[s->temp.pos++] != 0x00) ++ return XZ_OPTIONS_ERROR; ++ } ++#endif ++ ++ /* Valid Filter Flags always take at least two bytes. */ ++ if (s->temp.size - s->temp.pos < 2) ++ return XZ_DATA_ERROR; ++ ++ /* Filter ID = LZMA2 */ ++ if (s->temp.buf[s->temp.pos++] != 0x21) ++ return XZ_OPTIONS_ERROR; ++ ++ /* Size of Properties = 1-byte Filter Properties */ ++ if (s->temp.buf[s->temp.pos++] != 0x01) ++ return XZ_OPTIONS_ERROR; ++ ++ /* Filter Properties contains LZMA2 dictionary size. */ ++ if (s->temp.size - s->temp.pos < 1) ++ return XZ_DATA_ERROR; ++ ++ ret = xz_dec_lzma2_reset(s->lzma2, s->temp.buf[s->temp.pos++]); ++ if (ret != XZ_OK) ++ return ret; ++ ++ /* The rest must be Header Padding. */ ++ while (s->temp.pos < s->temp.size) ++ if (s->temp.buf[s->temp.pos++] != 0x00) ++ return XZ_OPTIONS_ERROR; ++ ++ s->temp.pos = 0; ++ s->block.compressed = 0; ++ s->block.uncompressed = 0; ++ ++ return XZ_OK; ++} ++ ++static enum xz_ret dec_main(struct xz_dec *s, struct xz_buf *b) ++{ ++ enum xz_ret ret; ++ ++ /* ++ * Store the start position for the case when we are in the middle ++ * of the Index field. ++ */ ++ s->in_start = b->in_pos; ++ ++ while (true) { ++ switch (s->sequence) { ++ case SEQ_STREAM_HEADER: ++ /* ++ * Stream Header is copied to s->temp, and then ++ * decoded from there. This way if the caller ++ * gives us only little input at a time, we can ++ * still keep the Stream Header decoding code ++ * simple. Similar approach is used in many places ++ * in this file. ++ */ ++ if (!fill_temp(s, b)) ++ return XZ_OK; ++ ++ /* ++ * If dec_stream_header() returns ++ * XZ_UNSUPPORTED_CHECK, it is still possible ++ * to continue decoding if working in multi-call ++ * mode. Thus, update s->sequence before calling ++ * dec_stream_header(). ++ */ ++ s->sequence = SEQ_BLOCK_START; ++ ++ ret = dec_stream_header(s); ++ if (ret != XZ_OK) ++ return ret; ++ ++ case SEQ_BLOCK_START: ++ /* We need one byte of input to continue. */ ++ if (b->in_pos == b->in_size) ++ return XZ_OK; ++ ++ /* See if this is the beginning of the Index field. */ ++ if (b->in[b->in_pos] == 0) { ++ s->in_start = b->in_pos++; ++ s->sequence = SEQ_INDEX; ++ break; ++ } ++ ++ /* ++ * Calculate the size of the Block Header and ++ * prepare to decode it. ++ */ ++ s->block_header.size ++ = ((uint32_t)b->in[b->in_pos] + 1) * 4; ++ ++ s->temp.size = s->block_header.size; ++ s->temp.pos = 0; ++ s->sequence = SEQ_BLOCK_HEADER; ++ ++ case SEQ_BLOCK_HEADER: ++ if (!fill_temp(s, b)) ++ return XZ_OK; ++ ++ ret = dec_block_header(s); ++ if (ret != XZ_OK) ++ return ret; ++ ++ s->sequence = SEQ_BLOCK_UNCOMPRESS; ++ ++ case SEQ_BLOCK_UNCOMPRESS: ++ ret = dec_block(s, b); ++ if (ret != XZ_STREAM_END) ++ return ret; ++ ++ s->sequence = SEQ_BLOCK_PADDING; ++ ++ case SEQ_BLOCK_PADDING: ++ /* ++ * Size of Compressed Data + Block Padding ++ * must be a multiple of four. We don't need ++ * s->block.compressed for anything else ++ * anymore, so we use it here to test the size ++ * of the Block Padding field. ++ */ ++ while (s->block.compressed & 3) { ++ if (b->in_pos == b->in_size) ++ return XZ_OK; ++ ++ if (b->in[b->in_pos++] != 0) ++ return XZ_DATA_ERROR; ++ ++ ++s->block.compressed; ++ } ++ ++ s->sequence = SEQ_BLOCK_CHECK; ++ ++ case SEQ_BLOCK_CHECK: ++ if (s->check_type == XZ_CHECK_CRC32) { ++ ret = crc32_validate(s, b); ++ if (ret != XZ_STREAM_END) ++ return ret; ++ } ++#ifdef XZ_DEC_ANY_CHECK ++ else if (!check_skip(s, b)) { ++ return XZ_OK; ++ } ++#endif ++ ++ s->sequence = SEQ_BLOCK_START; ++ break; ++ ++ case SEQ_INDEX: ++ ret = dec_index(s, b); ++ if (ret != XZ_STREAM_END) ++ return ret; ++ ++ s->sequence = SEQ_INDEX_PADDING; ++ ++ case SEQ_INDEX_PADDING: ++ while ((s->index.size + (b->in_pos - s->in_start)) ++ & 3) { ++ if (b->in_pos == b->in_size) { ++ index_update(s, b); ++ return XZ_OK; ++ } ++ ++ if (b->in[b->in_pos++] != 0) ++ return XZ_DATA_ERROR; ++ } ++ ++ /* Finish the CRC32 value and Index size. */ ++ index_update(s, b); ++ ++ /* Compare the hashes to validate the Index field. */ ++ if (!memeq(&s->block.hash, &s->index.hash, ++ sizeof(s->block.hash))) ++ return XZ_DATA_ERROR; ++ ++ s->sequence = SEQ_INDEX_CRC32; ++ ++ case SEQ_INDEX_CRC32: ++ ret = crc32_validate(s, b); ++ if (ret != XZ_STREAM_END) ++ return ret; ++ ++ s->temp.size = STREAM_HEADER_SIZE; ++ s->sequence = SEQ_STREAM_FOOTER; ++ ++ case SEQ_STREAM_FOOTER: ++ if (!fill_temp(s, b)) ++ return XZ_OK; ++ ++ return dec_stream_footer(s); ++ } ++ } ++ ++ /* Never reached */ ++} ++ ++/* ++ * xz_dec_run() is a wrapper for dec_main() to handle some special cases in ++ * multi-call and single-call decoding. ++ * ++ * In multi-call mode, we must return XZ_BUF_ERROR when it seems clear that we ++ * are not going to make any progress anymore. This is to prevent the caller ++ * from calling us infinitely when the input file is truncated or otherwise ++ * corrupt. Since zlib-style API allows that the caller fills the input buffer ++ * only when the decoder doesn't produce any new output, we have to be careful ++ * to avoid returning XZ_BUF_ERROR too easily: XZ_BUF_ERROR is returned only ++ * after the second consecutive call to xz_dec_run() that makes no progress. ++ * ++ * In single-call mode, if we couldn't decode everything and no error ++ * occurred, either the input is truncated or the output buffer is too small. ++ * Since we know that the last input byte never produces any output, we know ++ * that if all the input was consumed and decoding wasn't finished, the file ++ * must be corrupt. Otherwise the output buffer has to be too small or the ++ * file is corrupt in a way that decoding it produces too big output. ++ * ++ * If single-call decoding fails, we reset b->in_pos and b->out_pos back to ++ * their original values. This is because with some filter chains there won't ++ * be any valid uncompressed data in the output buffer unless the decoding ++ * actually succeeds (that's the price to pay of using the output buffer as ++ * the workspace). ++ */ ++XZ_EXTERN enum xz_ret xz_dec_run(struct xz_dec *s, struct xz_buf *b) ++{ ++ size_t in_start; ++ size_t out_start; ++ enum xz_ret ret; ++ ++ if (DEC_IS_SINGLE(s->mode)) ++ xz_dec_reset(s); ++ ++ in_start = b->in_pos; ++ out_start = b->out_pos; ++ ret = dec_main(s, b); ++ ++ if (DEC_IS_SINGLE(s->mode)) { ++ if (ret == XZ_OK) ++ ret = b->in_pos == b->in_size ++ ? XZ_DATA_ERROR : XZ_BUF_ERROR; ++ ++ if (ret != XZ_STREAM_END) { ++ b->in_pos = in_start; ++ b->out_pos = out_start; ++ } ++ ++ } else if (ret == XZ_OK && in_start == b->in_pos ++ && out_start == b->out_pos) { ++ if (s->allow_buf_error) ++ ret = XZ_BUF_ERROR; ++ ++ s->allow_buf_error = true; ++ } else { ++ s->allow_buf_error = false; ++ } ++ ++ return ret; ++} ++ ++XZ_EXTERN struct xz_dec *xz_dec_init(enum xz_mode mode, uint32_t dict_max) ++{ ++ struct xz_dec *s = kmalloc(sizeof(*s), GFP_KERNEL); ++ if (s == NULL) ++ return NULL; ++ ++ s->mode = mode; ++ ++#ifdef XZ_DEC_BCJ ++ s->bcj = xz_dec_bcj_create(DEC_IS_SINGLE(mode)); ++ if (s->bcj == NULL) ++ goto error_bcj; ++#endif ++ ++ s->lzma2 = xz_dec_lzma2_create(mode, dict_max); ++ if (s->lzma2 == NULL) ++ goto error_lzma2; ++ ++ xz_dec_reset(s); ++ return s; ++ ++error_lzma2: ++#ifdef XZ_DEC_BCJ ++ xz_dec_bcj_end(s->bcj); ++error_bcj: ++#endif ++ kfree(s); ++ return NULL; ++} ++ ++XZ_EXTERN void xz_dec_reset(struct xz_dec *s) ++{ ++ s->sequence = SEQ_STREAM_HEADER; ++ s->allow_buf_error = false; ++ s->pos = 0; ++ s->crc32 = 0; ++ memzero(&s->block, sizeof(s->block)); ++ memzero(&s->index, sizeof(s->index)); ++ s->temp.pos = 0; ++ s->temp.size = STREAM_HEADER_SIZE; ++} ++ ++XZ_EXTERN void xz_dec_end(struct xz_dec *s) ++{ ++ if (s != NULL) { ++ xz_dec_lzma2_end(s->lzma2); ++#ifdef XZ_DEC_BCJ ++ xz_dec_bcj_end(s->bcj); ++#endif ++ kfree(s); ++ } ++} +diff --git a/lib/xz/xz_dec_syms.c b/lib/xz/xz_dec_syms.c +new file mode 100644 +index 0000000..32eb3c0 +--- /dev/null ++++ b/lib/xz/xz_dec_syms.c +@@ -0,0 +1,26 @@ ++/* ++ * XZ decoder module information ++ * ++ * Author: Lasse Collin ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#include ++#include ++ ++EXPORT_SYMBOL(xz_dec_init); ++EXPORT_SYMBOL(xz_dec_reset); ++EXPORT_SYMBOL(xz_dec_run); ++EXPORT_SYMBOL(xz_dec_end); ++ ++MODULE_DESCRIPTION("XZ decompressor"); ++MODULE_VERSION("1.0"); ++MODULE_AUTHOR("Lasse Collin and Igor Pavlov"); ++ ++/* ++ * This code is in the public domain, but in Linux it's simplest to just ++ * say it's GPL and consider the authors as the copyright holders. ++ */ ++MODULE_LICENSE("GPL"); +diff --git a/lib/xz/xz_dec_test.c b/lib/xz/xz_dec_test.c +new file mode 100644 +index 0000000..da28a19 +--- /dev/null ++++ b/lib/xz/xz_dec_test.c +@@ -0,0 +1,220 @@ ++/* ++ * XZ decoder tester ++ * ++ * Author: Lasse Collin ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Maximum supported dictionary size */ ++#define DICT_MAX (1 << 20) ++ ++/* Device name to pass to register_chrdev(). */ ++#define DEVICE_NAME "xz_dec_test" ++ ++/* Dynamically allocated device major number */ ++static int device_major; ++ ++/* ++ * We reuse the same decoder state, and thus can decode only one ++ * file at a time. ++ */ ++static bool device_is_open; ++ ++/* XZ decoder state */ ++static struct xz_dec *state; ++ ++/* ++ * Return value of xz_dec_run(). We need to avoid calling xz_dec_run() after ++ * it has returned XZ_STREAM_END, so we make this static. ++ */ ++static enum xz_ret ret; ++ ++/* ++ * Input and output buffers. The input buffer is used as a temporary safe ++ * place for the data coming from the userspace. ++ */ ++static uint8_t buffer_in[1024]; ++static uint8_t buffer_out[1024]; ++ ++/* ++ * Structure to pass the input and output buffers to the XZ decoder. ++ * A few of the fields are never modified so we initialize them here. ++ */ ++static struct xz_buf buffers = { ++ .in = buffer_in, ++ .out = buffer_out, ++ .out_size = sizeof(buffer_out) ++}; ++ ++/* ++ * CRC32 of uncompressed data. This is used to give the user a simple way ++ * to check that the decoder produces correct output. ++ */ ++static uint32_t crc; ++ ++static int xz_dec_test_open(struct inode *i, struct file *f) ++{ ++ if (device_is_open) ++ return -EBUSY; ++ ++ device_is_open = true; ++ ++ xz_dec_reset(state); ++ ret = XZ_OK; ++ crc = 0xFFFFFFFF; ++ ++ buffers.in_pos = 0; ++ buffers.in_size = 0; ++ buffers.out_pos = 0; ++ ++ printk(KERN_INFO DEVICE_NAME ": opened\n"); ++ return 0; ++} ++ ++static int xz_dec_test_release(struct inode *i, struct file *f) ++{ ++ device_is_open = false; ++ ++ if (ret == XZ_OK) ++ printk(KERN_INFO DEVICE_NAME ": input was truncated\n"); ++ ++ printk(KERN_INFO DEVICE_NAME ": closed\n"); ++ return 0; ++} ++ ++/* ++ * Decode the data given to us from the userspace. CRC32 of the uncompressed ++ * data is calculated and is printed at the end of successful decoding. The ++ * uncompressed data isn't stored anywhere for further use. ++ * ++ * The .xz file must have exactly one Stream and no Stream Padding. The data ++ * after the first Stream is considered to be garbage. ++ */ ++static ssize_t xz_dec_test_write(struct file *file, const char __user *buf, ++ size_t size, loff_t *pos) ++{ ++ size_t remaining; ++ ++ if (ret != XZ_OK) { ++ if (size > 0) ++ printk(KERN_INFO DEVICE_NAME ": %zu bytes of " ++ "garbage at the end of the file\n", ++ size); ++ ++ return -ENOSPC; ++ } ++ ++ printk(KERN_INFO DEVICE_NAME ": decoding %zu bytes of input\n", ++ size); ++ ++ remaining = size; ++ while ((remaining > 0 || buffers.out_pos == buffers.out_size) ++ && ret == XZ_OK) { ++ if (buffers.in_pos == buffers.in_size) { ++ buffers.in_pos = 0; ++ buffers.in_size = min(remaining, sizeof(buffer_in)); ++ if (copy_from_user(buffer_in, buf, buffers.in_size)) ++ return -EFAULT; ++ ++ buf += buffers.in_size; ++ remaining -= buffers.in_size; ++ } ++ ++ buffers.out_pos = 0; ++ ret = xz_dec_run(state, &buffers); ++ crc = crc32(crc, buffer_out, buffers.out_pos); ++ } ++ ++ switch (ret) { ++ case XZ_OK: ++ printk(KERN_INFO DEVICE_NAME ": XZ_OK\n"); ++ return size; ++ ++ case XZ_STREAM_END: ++ printk(KERN_INFO DEVICE_NAME ": XZ_STREAM_END, " ++ "CRC32 = 0x%08X\n", ~crc); ++ return size - remaining - (buffers.in_size - buffers.in_pos); ++ ++ case XZ_MEMLIMIT_ERROR: ++ printk(KERN_INFO DEVICE_NAME ": XZ_MEMLIMIT_ERROR\n"); ++ break; ++ ++ case XZ_FORMAT_ERROR: ++ printk(KERN_INFO DEVICE_NAME ": XZ_FORMAT_ERROR\n"); ++ break; ++ ++ case XZ_OPTIONS_ERROR: ++ printk(KERN_INFO DEVICE_NAME ": XZ_OPTIONS_ERROR\n"); ++ break; ++ ++ case XZ_DATA_ERROR: ++ printk(KERN_INFO DEVICE_NAME ": XZ_DATA_ERROR\n"); ++ break; ++ ++ case XZ_BUF_ERROR: ++ printk(KERN_INFO DEVICE_NAME ": XZ_BUF_ERROR\n"); ++ break; ++ ++ default: ++ printk(KERN_INFO DEVICE_NAME ": Bug detected!\n"); ++ break; ++ } ++ ++ return -EIO; ++} ++ ++/* Allocate the XZ decoder state and register the character device. */ ++static int __init xz_dec_test_init(void) ++{ ++ static const struct file_operations fileops = { ++ .owner = THIS_MODULE, ++ .open = &xz_dec_test_open, ++ .release = &xz_dec_test_release, ++ .write = &xz_dec_test_write ++ }; ++ ++ state = xz_dec_init(XZ_PREALLOC, DICT_MAX); ++ if (state == NULL) ++ return -ENOMEM; ++ ++ device_major = register_chrdev(0, DEVICE_NAME, &fileops); ++ if (device_major < 0) { ++ xz_dec_end(state); ++ return device_major; ++ } ++ ++ printk(KERN_INFO DEVICE_NAME ": module loaded\n"); ++ printk(KERN_INFO DEVICE_NAME ": Create a device node with " ++ "'mknod " DEVICE_NAME " c %d 0' and write .xz files " ++ "to it.\n", device_major); ++ return 0; ++} ++ ++static void __exit xz_dec_test_exit(void) ++{ ++ unregister_chrdev(device_major, DEVICE_NAME); ++ xz_dec_end(state); ++ printk(KERN_INFO DEVICE_NAME ": module unloaded\n"); ++} ++ ++module_init(xz_dec_test_init); ++module_exit(xz_dec_test_exit); ++ ++MODULE_DESCRIPTION("XZ decompressor tester"); ++MODULE_VERSION("1.0"); ++MODULE_AUTHOR("Lasse Collin "); ++ ++/* ++ * This code is in the public domain, but in Linux it's simplest to just ++ * say it's GPL and consider the authors as the copyright holders. ++ */ ++MODULE_LICENSE("GPL"); +diff --git a/lib/xz/xz_lzma2.h b/lib/xz/xz_lzma2.h +new file mode 100644 +index 0000000..071d67b +--- /dev/null ++++ b/lib/xz/xz_lzma2.h +@@ -0,0 +1,204 @@ ++/* ++ * LZMA2 definitions ++ * ++ * Authors: Lasse Collin ++ * Igor Pavlov ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#ifndef XZ_LZMA2_H ++#define XZ_LZMA2_H ++ ++/* Range coder constants */ ++#define RC_SHIFT_BITS 8 ++#define RC_TOP_BITS 24 ++#define RC_TOP_VALUE (1 << RC_TOP_BITS) ++#define RC_BIT_MODEL_TOTAL_BITS 11 ++#define RC_BIT_MODEL_TOTAL (1 << RC_BIT_MODEL_TOTAL_BITS) ++#define RC_MOVE_BITS 5 ++ ++/* ++ * Maximum number of position states. A position state is the lowest pb ++ * number of bits of the current uncompressed offset. In some places there ++ * are different sets of probabilities for different position states. ++ */ ++#define POS_STATES_MAX (1 << 4) ++ ++/* ++ * This enum is used to track which LZMA symbols have occurred most recently ++ * and in which order. This information is used to predict the next symbol. ++ * ++ * Symbols: ++ * - Literal: One 8-bit byte ++ * - Match: Repeat a chunk of data at some distance ++ * - Long repeat: Multi-byte match at a recently seen distance ++ * - Short repeat: One-byte repeat at a recently seen distance ++ * ++ * The symbol names are in from STATE_oldest_older_previous. REP means ++ * either short or long repeated match, and NONLIT means any non-literal. ++ */ ++enum lzma_state { ++ STATE_LIT_LIT, ++ STATE_MATCH_LIT_LIT, ++ STATE_REP_LIT_LIT, ++ STATE_SHORTREP_LIT_LIT, ++ STATE_MATCH_LIT, ++ STATE_REP_LIT, ++ STATE_SHORTREP_LIT, ++ STATE_LIT_MATCH, ++ STATE_LIT_LONGREP, ++ STATE_LIT_SHORTREP, ++ STATE_NONLIT_MATCH, ++ STATE_NONLIT_REP ++}; ++ ++/* Total number of states */ ++#define STATES 12 ++ ++/* The lowest 7 states indicate that the previous state was a literal. */ ++#define LIT_STATES 7 ++ ++/* Indicate that the latest symbol was a literal. */ ++static inline void lzma_state_literal(enum lzma_state *state) ++{ ++ if (*state <= STATE_SHORTREP_LIT_LIT) ++ *state = STATE_LIT_LIT; ++ else if (*state <= STATE_LIT_SHORTREP) ++ *state -= 3; ++ else ++ *state -= 6; ++} ++ ++/* Indicate that the latest symbol was a match. */ ++static inline void lzma_state_match(enum lzma_state *state) ++{ ++ *state = *state < LIT_STATES ? STATE_LIT_MATCH : STATE_NONLIT_MATCH; ++} ++ ++/* Indicate that the latest state was a long repeated match. */ ++static inline void lzma_state_long_rep(enum lzma_state *state) ++{ ++ *state = *state < LIT_STATES ? STATE_LIT_LONGREP : STATE_NONLIT_REP; ++} ++ ++/* Indicate that the latest symbol was a short match. */ ++static inline void lzma_state_short_rep(enum lzma_state *state) ++{ ++ *state = *state < LIT_STATES ? STATE_LIT_SHORTREP : STATE_NONLIT_REP; ++} ++ ++/* Test if the previous symbol was a literal. */ ++static inline bool lzma_state_is_literal(enum lzma_state state) ++{ ++ return state < LIT_STATES; ++} ++ ++/* Each literal coder is divided in three sections: ++ * - 0x001-0x0FF: Without match byte ++ * - 0x101-0x1FF: With match byte; match bit is 0 ++ * - 0x201-0x2FF: With match byte; match bit is 1 ++ * ++ * Match byte is used when the previous LZMA symbol was something else than ++ * a literal (that is, it was some kind of match). ++ */ ++#define LITERAL_CODER_SIZE 0x300 ++ ++/* Maximum number of literal coders */ ++#define LITERAL_CODERS_MAX (1 << 4) ++ ++/* Minimum length of a match is two bytes. */ ++#define MATCH_LEN_MIN 2 ++ ++/* Match length is encoded with 4, 5, or 10 bits. ++ * ++ * Length Bits ++ * 2-9 4 = Choice=0 + 3 bits ++ * 10-17 5 = Choice=1 + Choice2=0 + 3 bits ++ * 18-273 10 = Choice=1 + Choice2=1 + 8 bits ++ */ ++#define LEN_LOW_BITS 3 ++#define LEN_LOW_SYMBOLS (1 << LEN_LOW_BITS) ++#define LEN_MID_BITS 3 ++#define LEN_MID_SYMBOLS (1 << LEN_MID_BITS) ++#define LEN_HIGH_BITS 8 ++#define LEN_HIGH_SYMBOLS (1 << LEN_HIGH_BITS) ++#define LEN_SYMBOLS (LEN_LOW_SYMBOLS + LEN_MID_SYMBOLS + LEN_HIGH_SYMBOLS) ++ ++/* ++ * Maximum length of a match is 273 which is a result of the encoding ++ * described above. ++ */ ++#define MATCH_LEN_MAX (MATCH_LEN_MIN + LEN_SYMBOLS - 1) ++ ++/* ++ * Different sets of probabilities are used for match distances that have ++ * very short match length: Lengths of 2, 3, and 4 bytes have a separate ++ * set of probabilities for each length. The matches with longer length ++ * use a shared set of probabilities. ++ */ ++#define DIST_STATES 4 ++ ++/* ++ * Get the index of the appropriate probability array for decoding ++ * the distance slot. ++ */ ++static inline uint32_t lzma_get_dist_state(uint32_t len) ++{ ++ return len < DIST_STATES + MATCH_LEN_MIN ++ ? len - MATCH_LEN_MIN : DIST_STATES - 1; ++} ++ ++/* ++ * The highest two bits of a 32-bit match distance are encoded using six bits. ++ * This six-bit value is called a distance slot. This way encoding a 32-bit ++ * value takes 6-36 bits, larger values taking more bits. ++ */ ++#define DIST_SLOT_BITS 6 ++#define DIST_SLOTS (1 << DIST_SLOT_BITS) ++ ++/* Match distances up to 127 are fully encoded using probabilities. Since ++ * the highest two bits (distance slot) are always encoded using six bits, ++ * the distances 0-3 don't need any additional bits to encode, since the ++ * distance slot itself is the same as the actual distance. DIST_MODEL_START ++ * indicates the first distance slot where at least one additional bit is ++ * needed. ++ */ ++#define DIST_MODEL_START 4 ++ ++/* ++ * Match distances greater than 127 are encoded in three pieces: ++ * - distance slot: the highest two bits ++ * - direct bits: 2-26 bits below the highest two bits ++ * - alignment bits: four lowest bits ++ * ++ * Direct bits don't use any probabilities. ++ * ++ * The distance slot value of 14 is for distances 128-191. ++ */ ++#define DIST_MODEL_END 14 ++ ++/* Distance slots that indicate a distance <= 127. */ ++#define FULL_DISTANCES_BITS (DIST_MODEL_END / 2) ++#define FULL_DISTANCES (1 << FULL_DISTANCES_BITS) ++ ++/* ++ * For match distances greater than 127, only the highest two bits and the ++ * lowest four bits (alignment) is encoded using probabilities. ++ */ ++#define ALIGN_BITS 4 ++#define ALIGN_SIZE (1 << ALIGN_BITS) ++#define ALIGN_MASK (ALIGN_SIZE - 1) ++ ++/* Total number of all probability variables */ ++#define PROBS_TOTAL (1846 + LITERAL_CODERS_MAX * LITERAL_CODER_SIZE) ++ ++/* ++ * LZMA remembers the four most recent match distances. Reusing these ++ * distances tends to take less space than re-encoding the actual ++ * distance value. ++ */ ++#define REPS 4 ++ ++#endif +diff --git a/lib/xz/xz_private.h b/lib/xz/xz_private.h +new file mode 100644 +index 0000000..a65633e +--- /dev/null ++++ b/lib/xz/xz_private.h +@@ -0,0 +1,156 @@ ++/* ++ * Private includes and definitions ++ * ++ * Author: Lasse Collin ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#ifndef XZ_PRIVATE_H ++#define XZ_PRIVATE_H ++ ++#ifdef __KERNEL__ ++# include ++# include ++# include ++ /* XZ_PREBOOT may be defined only via decompress_unxz.c. */ ++# ifndef XZ_PREBOOT ++# include ++# include ++# include ++# ifdef CONFIG_XZ_DEC_X86 ++# define XZ_DEC_X86 ++# endif ++# ifdef CONFIG_XZ_DEC_POWERPC ++# define XZ_DEC_POWERPC ++# endif ++# ifdef CONFIG_XZ_DEC_IA64 ++# define XZ_DEC_IA64 ++# endif ++# ifdef CONFIG_XZ_DEC_ARM ++# define XZ_DEC_ARM ++# endif ++# ifdef CONFIG_XZ_DEC_ARMTHUMB ++# define XZ_DEC_ARMTHUMB ++# endif ++# ifdef CONFIG_XZ_DEC_SPARC ++# define XZ_DEC_SPARC ++# endif ++# define memeq(a, b, size) (memcmp(a, b, size) == 0) ++# define memzero(buf, size) memset(buf, 0, size) ++# endif ++# define get_le32(p) le32_to_cpup((const uint32_t *)(p)) ++#else ++ /* ++ * For userspace builds, use a separate header to define the required ++ * macros and functions. This makes it easier to adapt the code into ++ * different environments and avoids clutter in the Linux kernel tree. ++ */ ++# include "xz_config.h" ++#endif ++ ++/* If no specific decoding mode is requested, enable support for all modes. */ ++#if !defined(XZ_DEC_SINGLE) && !defined(XZ_DEC_PREALLOC) \ ++ && !defined(XZ_DEC_DYNALLOC) ++# define XZ_DEC_SINGLE ++# define XZ_DEC_PREALLOC ++# define XZ_DEC_DYNALLOC ++#endif ++ ++/* ++ * The DEC_IS_foo(mode) macros are used in "if" statements. If only some ++ * of the supported modes are enabled, these macros will evaluate to true or ++ * false at compile time and thus allow the compiler to omit unneeded code. ++ */ ++#ifdef XZ_DEC_SINGLE ++# define DEC_IS_SINGLE(mode) ((mode) == XZ_SINGLE) ++#else ++# define DEC_IS_SINGLE(mode) (false) ++#endif ++ ++#ifdef XZ_DEC_PREALLOC ++# define DEC_IS_PREALLOC(mode) ((mode) == XZ_PREALLOC) ++#else ++# define DEC_IS_PREALLOC(mode) (false) ++#endif ++ ++#ifdef XZ_DEC_DYNALLOC ++# define DEC_IS_DYNALLOC(mode) ((mode) == XZ_DYNALLOC) ++#else ++# define DEC_IS_DYNALLOC(mode) (false) ++#endif ++ ++#if !defined(XZ_DEC_SINGLE) ++# define DEC_IS_MULTI(mode) (true) ++#elif defined(XZ_DEC_PREALLOC) || defined(XZ_DEC_DYNALLOC) ++# define DEC_IS_MULTI(mode) ((mode) != XZ_SINGLE) ++#else ++# define DEC_IS_MULTI(mode) (false) ++#endif ++ ++/* ++ * If any of the BCJ filter decoders are wanted, define XZ_DEC_BCJ. ++ * XZ_DEC_BCJ is used to enable generic support for BCJ decoders. ++ */ ++#ifndef XZ_DEC_BCJ ++# if defined(XZ_DEC_X86) || defined(XZ_DEC_POWERPC) \ ++ || defined(XZ_DEC_IA64) || defined(XZ_DEC_ARM) \ ++ || defined(XZ_DEC_ARM) || defined(XZ_DEC_ARMTHUMB) \ ++ || defined(XZ_DEC_SPARC) ++# define XZ_DEC_BCJ ++# endif ++#endif ++ ++/* ++ * Allocate memory for LZMA2 decoder. xz_dec_lzma2_reset() must be used ++ * before calling xz_dec_lzma2_run(). ++ */ ++XZ_EXTERN struct xz_dec_lzma2 *xz_dec_lzma2_create(enum xz_mode mode, ++ uint32_t dict_max); ++ ++/* ++ * Decode the LZMA2 properties (one byte) and reset the decoder. Return ++ * XZ_OK on success, XZ_MEMLIMIT_ERROR if the preallocated dictionary is not ++ * big enough, and XZ_OPTIONS_ERROR if props indicates something that this ++ * decoder doesn't support. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_lzma2_reset(struct xz_dec_lzma2 *s, ++ uint8_t props); ++ ++/* Decode raw LZMA2 stream from b->in to b->out. */ ++XZ_EXTERN enum xz_ret xz_dec_lzma2_run(struct xz_dec_lzma2 *s, ++ struct xz_buf *b); ++ ++/* Free the memory allocated for the LZMA2 decoder. */ ++XZ_EXTERN void xz_dec_lzma2_end(struct xz_dec_lzma2 *s); ++ ++#ifdef XZ_DEC_BCJ ++/* ++ * Allocate memory for BCJ decoders. xz_dec_bcj_reset() must be used before ++ * calling xz_dec_bcj_run(). ++ */ ++XZ_EXTERN struct xz_dec_bcj *xz_dec_bcj_create(bool single_call); ++ ++/* ++ * Decode the Filter ID of a BCJ filter. This implementation doesn't ++ * support custom start offsets, so no decoding of Filter Properties ++ * is needed. Returns XZ_OK if the given Filter ID is supported. ++ * Otherwise XZ_OPTIONS_ERROR is returned. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint8_t id); ++ ++/* ++ * Decode raw BCJ + LZMA2 stream. This must be used only if there actually is ++ * a BCJ filter in the chain. If the chain has only LZMA2, xz_dec_lzma2_run() ++ * must be called directly. ++ */ ++XZ_EXTERN enum xz_ret xz_dec_bcj_run(struct xz_dec_bcj *s, ++ struct xz_dec_lzma2 *lzma2, ++ struct xz_buf *b); ++ ++/* Free the memory allocated for the BCJ filters. */ ++#define xz_dec_bcj_end(s) kfree(s) ++#endif ++ ++#endif +diff --git a/lib/xz/xz_stream.h b/lib/xz/xz_stream.h +new file mode 100644 +index 0000000..66cb5a7 +--- /dev/null ++++ b/lib/xz/xz_stream.h +@@ -0,0 +1,62 @@ ++/* ++ * Definitions for handling the .xz file format ++ * ++ * Author: Lasse Collin ++ * ++ * This file has been put into the public domain. ++ * You can do whatever you want with this file. ++ */ ++ ++#ifndef XZ_STREAM_H ++#define XZ_STREAM_H ++ ++#if defined(__KERNEL__) && !XZ_INTERNAL_CRC32 ++# include ++# undef crc32 ++# define xz_crc32(buf, size, crc) \ ++ (~crc32_le(~(uint32_t)(crc), buf, size)) ++#endif ++ ++/* ++ * See the .xz file format specification at ++ * http://tukaani.org/xz/xz-file-format.txt ++ * to understand the container format. ++ */ ++ ++#define STREAM_HEADER_SIZE 12 ++ ++#define HEADER_MAGIC "\3757zXZ" ++#define HEADER_MAGIC_SIZE 6 ++ ++#define FOOTER_MAGIC "YZ" ++#define FOOTER_MAGIC_SIZE 2 ++ ++/* ++ * Variable-length integer can hold a 63-bit unsigned integer or a special ++ * value indicating that the value is unknown. ++ * ++ * Experimental: vli_type can be defined to uint32_t to save a few bytes ++ * in code size (no effect on speed). Doing so limits the uncompressed and ++ * compressed size of the file to less than 256 MiB and may also weaken ++ * error detection slightly. ++ */ ++typedef uint64_t vli_type; ++ ++#define VLI_MAX ((vli_type)-1 / 2) ++#define VLI_UNKNOWN ((vli_type)-1) ++ ++/* Maximum encoded size of a VLI */ ++#define VLI_BYTES_MAX (sizeof(vli_type) * 8 / 7) ++ ++/* Integrity Check types */ ++enum xz_check { ++ XZ_CHECK_NONE = 0, ++ XZ_CHECK_CRC32 = 1, ++ XZ_CHECK_CRC64 = 4, ++ XZ_CHECK_SHA256 = 10 ++}; ++ ++/* Maximum possible Check ID */ ++#define XZ_CHECK_MAX 15 ++ ++#endif +diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib +index 54fd1b7..b862007 100644 +--- a/scripts/Makefile.lib ++++ b/scripts/Makefile.lib +@@ -246,6 +246,34 @@ cmd_lzo = (cat $(filter-out FORCE,$^) | \ + lzop -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ + (rm -f $@ ; false) + ++# XZ ++# --------------------------------------------------------------------------- ++# Use xzkern to compress the kernel image and xzmisc to compress other things. ++# ++# xzkern uses a big LZMA2 dictionary since it doesn't increase memory usage ++# of the kernel decompressor. A BCJ filter is used if it is available for ++# the target architecture. xzkern also appends uncompressed size of the data ++# using size_append. The .xz format has the size information available at ++# the end of the file too, but it's in more complex format and it's good to ++# avoid changing the part of the boot code that reads the uncompressed size. ++# Note that the bytes added by size_append will make the xz tool think that ++# the file is corrupt. This is expected. ++# ++# xzmisc doesn't use size_append, so it can be used to create normal .xz ++# files. xzmisc uses smaller LZMA2 dictionary than xzkern, because a very ++# big dictionary would increase the memory usage too much in the multi-call ++# decompression mode. A BCJ filter isn't used either. ++quiet_cmd_xzkern = XZKERN $@ ++cmd_xzkern = (cat $(filter-out FORCE,$^) | \ ++ sh $(srctree)/scripts/xz_wrap.sh && \ ++ $(call size_append, $(filter-out FORCE,$^))) > $@ || \ ++ (rm -f $@ ; false) ++ ++quiet_cmd_xzmisc = XZMISC $@ ++cmd_xzmisc = (cat $(filter-out FORCE,$^) | \ ++ xz --check=crc32 --lzma2=dict=1MiB) > $@ || \ ++ (rm -f $@ ; false) ++ + # misc stuff + # --------------------------------------------------------------------------- + quote:=" +diff --git a/scripts/xz_wrap.sh b/scripts/xz_wrap.sh +new file mode 100644 +index 0000000..17a5798 +--- /dev/null ++++ b/scripts/xz_wrap.sh +@@ -0,0 +1,23 @@ ++#!/bin/sh ++# ++# This is a wrapper for xz to compress the kernel image using appropriate ++# compression options depending on the architecture. ++# ++# Author: Lasse Collin ++# ++# This file has been put into the public domain. ++# You can do whatever you want with this file. ++# ++ ++BCJ= ++LZMA2OPTS= ++ ++case $ARCH in ++ x86|x86_64) BCJ=--x86 ;; ++ powerpc) BCJ=--powerpc ;; ++ ia64) BCJ=--ia64; LZMA2OPTS=pb=4 ;; ++ arm) BCJ=--arm ;; ++ sparc) BCJ=--sparc ;; ++esac ++ ++exec xz --check=crc32 $BCJ --lzma2=$LZMA2OPTS,dict=32MiB diff -r abe27fd0192d -r bfe7a1389859 linux-libre/stuff/linux-libre-2.6.37-libre-slitaz.config --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/linux-libre/stuff/linux-libre-2.6.37-libre-slitaz.config Tue Mar 15 03:24:23 2011 +0100 @@ -0,0 +1,3711 @@ +# +# Automatically generated make config: don't edit +# Linux/i386 2.6.37 Kernel Configuration +# Mon Feb 14 03:03:39 2011 +# +# CONFIG_64BIT is not set +CONFIG_X86_32=y +# CONFIG_X86_64 is not set +CONFIG_X86=y +CONFIG_INSTRUCTION_DECODER=y +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_MMU=y +CONFIG_ZONE_DMA=y +# CONFIG_NEED_DMA_MAP_STATE is not set +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_GPIO=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +# CONFIG_RWSEM_GENERIC_SPINLOCK is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME_VSYSCALL is not set +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_DEFAULT_IDLE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ZONE_DMA32 is not set +CONFIG_ARCH_POPULATES_NODE_MAP=y +# CONFIG_AUDIT_ARCH is not set +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_X86_32_SMP=y +CONFIG_X86_HT=y +CONFIG_X86_TRAMPOLINE=y +CONFIG_X86_32_LAZY_GS=y +CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" +CONFIG_KTIME_SCALAR=y +CONFIG_ARCH_CPU_PROBE_RELEASE=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y +CONFIG_HAVE_IRQ_WORK=y +CONFIG_IRQ_WORK=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="-slitaz" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_BZIP2 is not set +CONFIG_KERNEL_LZMA=y +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set +CONFIG_HAVE_SPARSE_IRQ=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_PENDING_IRQ=y +# CONFIG_AUTO_IRQ_AFFINITY is not set +# CONFIG_IRQ_PER_CPU is not set +# CONFIG_HARDIRQS_SW_RESEND is not set +# CONFIG_SPARSE_IRQ is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +# CONFIG_CGROUPS is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_PERF_COUNTERS is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y + +# +# GCOV-based kernel profiling +# +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_PREEMPT_NOTIFIERS=y +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Processor type and features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_SMP=y +CONFIG_X86_MPPARSE=y +# CONFIG_X86_BIGSMP is not set +CONFIG_X86_EXTENDED_PLATFORM=y +# CONFIG_X86_ELAN is not set +# CONFIG_X86_MRST is not set +# CONFIG_X86_RDC321X is not set +# CONFIG_X86_32_NON_STANDARD is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_PARAVIRT_GUEST=y +# CONFIG_XEN_PRIVILEGED_GUEST is not set +CONFIG_KVM_CLOCK=y +CONFIG_KVM_GUEST=y +CONFIG_LGUEST_GUEST=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_SPINLOCKS is not set +CONFIG_PARAVIRT_CLOCK=y +CONFIG_NO_BOOTMEM=y +# CONFIG_MEMTEST is not set +# CONFIG_M386 is not set +CONFIG_M486=y +# CONFIG_M586 is not set +# CONFIG_M586TSC is not set +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPENTIUM4 is not set +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MWINCHIPC6 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +# CONFIG_MCORE2 is not set +# CONFIG_MATOM is not set +CONFIG_X86_GENERIC=y +CONFIG_X86_CPU=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_CMPXCHG=y +CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_XADD=y +CONFIG_X86_PPRO_FENCE=y +CONFIG_X86_F00F_BUG=y +CONFIG_X86_INVD_BUG=y +CONFIG_X86_WP_WORKS_OK=y +CONFIG_X86_INVLPG=y +CONFIG_X86_BSWAP=y +CONFIG_X86_POPAD_OK=y +CONFIG_X86_ALIGNMENT_16=y +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_MINIMUM_CPU_FAMILY=4 +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +# CONFIG_HPET_TIMER is not set +CONFIG_DMI=y +# CONFIG_IOMMU_HELPER is not set +# CONFIG_IOMMU_API is not set +CONFIG_NR_CPUS=8 +# CONFIG_SCHED_SMT is not set +CONFIG_SCHED_MC=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +CONFIG_X86_MCE=y +CONFIG_X86_MCE_INTEL=y +CONFIG_X86_MCE_AMD=y +# CONFIG_X86_ANCIENT_MCE is not set +CONFIG_X86_MCE_THRESHOLD=y +# CONFIG_X86_MCE_INJECT is not set +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_VM86=y +CONFIG_TOSHIBA=m +CONFIG_I8K=m +CONFIG_X86_REBOOTFIXUPS=y +# CONFIG_MICROCODE is not set +# CONFIG_X86_MSR is not set +# CONFIG_X86_CPUID is not set +# CONFIG_NOHIGHMEM is not set +CONFIG_HIGHMEM4G=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_HIGHMEM=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_MMU_NOTIFIER=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_HIGHPTE is not set +# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set +CONFIG_X86_RESERVE_LOW=64 +CONFIG_MATH_EMULATION=y +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +CONFIG_X86_PAT=y +CONFIG_ARCH_USES_PG_UNCACHED=y +# CONFIG_EFI is not set +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +# CONFIG_SCHED_HRTICK is not set +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +# CONFIG_KEXEC_JUMP is not set +CONFIG_PHYSICAL_START=0x1000000 +# CONFIG_RELOCATABLE is not set +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_HOTPLUG_CPU=y +CONFIG_COMPAT_VDSO=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y + +# +# Power management and ACPI options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_NVS=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +# CONFIG_PM_RUNTIME is not set +CONFIG_PM_OPS=y +CONFIG_ACPI=y +CONFIG_ACPI_SLEEP=y +# CONFIG_ACPI_PROCFS is not set +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_POWER_METER=m +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_PROC_EVENT=y +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=m +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_FAN=y +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ACPI_BLACKLIST_YEAR=0 +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_X86_PM_TIMER=y +CONFIG_ACPI_CONTAINER=y +# CONFIG_ACPI_SBS is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_APEI is not set +# CONFIG_SFI is not set +CONFIG_X86_APM_BOOT=y +CONFIG_APM=y +# CONFIG_APM_IGNORE_USER_SUSPEND is not set +CONFIG_APM_DO_ENABLE=y +# CONFIG_APM_CPU_IDLE is not set +# CONFIG_APM_DISPLAY_BLANK is not set +# CONFIG_APM_ALLOW_INTS is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m + +# +# CPUFreq processor drivers +# +CONFIG_X86_PCC_CPUFREQ=m +CONFIG_X86_ACPI_CPUFREQ=m +CONFIG_X86_POWERNOW_K6=m +CONFIG_X86_POWERNOW_K7=m +CONFIG_X86_POWERNOW_K7_ACPI=y +CONFIG_X86_POWERNOW_K8=m +CONFIG_X86_GX_SUSPMOD=m +# CONFIG_X86_SPEEDSTEP_CENTRINO is not set +CONFIG_X86_SPEEDSTEP_ICH=m +CONFIG_X86_SPEEDSTEP_SMI=m +CONFIG_X86_P4_CLOCKMOD=m +CONFIG_X86_CPUFREQ_NFORCE2=m +CONFIG_X86_LONGRUN=m +CONFIG_X86_LONGHAUL=m +CONFIG_X86_E_POWERSAVER=m + +# +# shared options +# +CONFIG_X86_SPEEDSTEP_LIB=m +CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_INTEL_IDLE is not set + +# +# Bus options (PCI etc.) +# +CONFIG_PCI=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GOMMCONFIG is not set +# CONFIG_PCI_GODIRECT is not set +CONFIG_PCI_GOANY=y +CONFIG_PCI_BIOS=y +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_CNB20LE_QUIRK=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +# CONFIG_PCI_STUB is not set +CONFIG_HT_IRQ=y +# CONFIG_PCI_IOV is not set +CONFIG_PCI_IOAPIC=y +CONFIG_ISA_DMA_API=y +CONFIG_ISA=y +# CONFIG_EISA is not set +# CONFIG_MCA is not set +# CONFIG_SCx200 is not set +# CONFIG_OLPC is not set +# CONFIG_OLPC_OPENFIRMWARE is not set +CONFIG_AMD_NB=y +CONFIG_PCCARD=m +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=m +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_PD6729=m +CONFIG_I82092=m +CONFIG_I82365=m +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PROBE=y +CONFIG_PCCARD_NONSTATIC=y +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats / Emulations +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=m +CONFIG_HAVE_ATOMIC_IOMAP=y +CONFIG_HAVE_TEXT_POKE_SMP=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=y +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +CONFIG_INET_XFRM_TUNNEL=y +CONFIG_INET_TUNNEL=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=m +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +# CONFIG_NETFILTER_TPROXY is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +# CONFIG_NETFILTER_XT_TARGET_CT is not set +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +# CONFIG_NETFILTER_XT_MATCH_IPVS is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_NFCT=y +# CONFIG_IP_VS_PE_SIP is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_DCCP=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +CONFIG_ATM_CLIP_NO_ICMP=y +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +# CONFIG_VLAN_8021Q_GVRP is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +CONFIG_LTPC=m +CONFIG_COPS=m +CONFIG_COPS_DAYNA=y +CONFIG_COPS_TANGENT=y +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_INGRESS=m + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +# CONFIG_NET_ACT_CSUM is not set +CONFIG_NET_CLS_IND=y +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_RPS=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +# CONFIG_IRDA_CACHE_LAST_LSAP is not set +# CONFIG_IRDA_FAST_RR is not set +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_NSC_FIR is not set +# CONFIG_WINBOND_FIR is not set +# CONFIG_TOSHIBA_FIR is not set +# CONFIG_SMC_IRCC_FIR is not set +# CONFIG_ALI_FIR is not set +# CONFIG_VLSI_FIR is not set +# CONFIG_VIA_FIR is not set +# CONFIG_MCS_FIR is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +# CONFIG_BT_BNEP is not set +# CONFIG_BT_CMTP is not set +# CONFIG_BT_HIDP is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIDTL1 is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBTUART is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_WIMAX=m +CONFIG_WIMAX_DEBUG_LEVEL=8 +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +# CONFIG_DEVTMPFS_MOUNT is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +# CONFIG_PARPORT_SERIAL is not set +# CONFIG_PARPORT_PC_FIFO is not set +# CONFIG_PARPORT_PC_SUPERIO is not set +# CONFIG_PARPORT_PC_PCMCIA is not set +# CONFIG_PARPORT_GSC is not set +# CONFIG_PARPORT_AX88796 is not set +CONFIG_PARPORT_1284=y +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_ISAPNP=y +# CONFIG_PNPBIOS is not set +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_FD=m +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=m +# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_RBD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_AD525X_DPOT is not set +# CONFIG_IBM_ASM is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +CONFIG_TIFM_CORE=m +CONFIG_TIFM_7XX1=m +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_CS5535_MFGPT is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_VMWARE_BALLOON is not set +# CONFIG_BMP085 is not set +# CONFIG_PCH_PHUB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=m +CONFIG_CB710_CORE=m +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y +CONFIG_IWMC3200TOP=m +# CONFIG_IWMC3200TOP_DEBUG is not set +# CONFIG_IWMC3200TOP_DEBUGFS is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +CONFIG_IDE_XFER_MODE=y +CONFIG_IDE_TIMINGS=y +CONFIG_IDE_ATAPI=y +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_IDE_GD=y +CONFIG_IDE_GD_ATA=y +# CONFIG_IDE_GD_ATAPI is not set +CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_DELKIN is not set +CONFIG_BLK_DEV_IDECD=y +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEACPI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_PLATFORM is not set +CONFIG_BLK_DEV_CMD640=y +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set +# CONFIG_BLK_DEV_IDEPNP is not set +CONFIG_BLK_DEV_IDEDMA_SFF=y + +# +# PCI IDE chipsets support +# +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_PCIBUS_ORDER=y +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_RZ1000=y +CONFIG_BLK_DEV_IDEDMA_PCI=y +CONFIG_BLK_DEV_AEC62XX=y +CONFIG_BLK_DEV_ALI15X3=y +CONFIG_BLK_DEV_AMD74XX=y +CONFIG_BLK_DEV_ATIIXP=y +CONFIG_BLK_DEV_CMD64X=y +CONFIG_BLK_DEV_TRIFLEX=y +# CONFIG_BLK_DEV_CS5520 is not set +CONFIG_BLK_DEV_CS5530=y +CONFIG_BLK_DEV_CS5535=y +# CONFIG_BLK_DEV_CS5536 is not set +# CONFIG_BLK_DEV_HPT366 is not set +CONFIG_BLK_DEV_JMICRON=y +# CONFIG_BLK_DEV_SC1200 is not set +CONFIG_BLK_DEV_PIIX=y +# CONFIG_BLK_DEV_IT8172 is not set +CONFIG_BLK_DEV_IT8213=y +CONFIG_BLK_DEV_IT821X=y +CONFIG_BLK_DEV_NS87415=y +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +CONFIG_BLK_DEV_PDC202XX_NEW=y +CONFIG_BLK_DEV_SVWKS=y +CONFIG_BLK_DEV_SIIMAGE=y +CONFIG_BLK_DEV_SIS5513=y +CONFIG_BLK_DEV_SLC90E66=y +CONFIG_BLK_DEV_TRM290=y +CONFIG_BLK_DEV_VIA82CXXX=y +# CONFIG_BLK_DEV_TC86C001 is not set + +# +# Other IDE chipsets support +# + +# +# Note: most of these also require special kernel boot parameters +# +# CONFIG_BLK_DEV_4DRIVES is not set +# CONFIG_BLK_DEV_ALI14XX is not set +# CONFIG_BLK_DEV_DTC2278 is not set +# CONFIG_BLK_DEV_HT6560B is not set +# CONFIG_BLK_DEV_QD65XX is not set +# CONFIG_BLK_DEV_UMC8672 is not set +CONFIG_BLK_DEV_IDEDMA=y + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_7000FASST is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AHA1542 is not set +# CONFIG_SCSI_AACRAID is not set +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 +CONFIG_AIC7XXX_RESET_DELAY_MS=5000 +CONFIG_AIC7XXX_DEBUG_ENABLE=y +CONFIG_AIC7XXX_DEBUG_MASK=0 +CONFIG_AIC7XXX_REG_PRETTY_PRINT=y +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_VMWARE_PVSCSI is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_FCOE_FNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_PPA is not set +# CONFIG_SCSI_IMM is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_U14_34F is not set +# CONFIG_SCSI_ULTRASTOR is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_ACPI=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +# CONFIG_SATA_AHCI_PLATFORM is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +CONFIG_ATA_PIIX=y +# CONFIG_SATA_MV is not set +CONFIG_SATA_NV=y +# CONFIG_SATA_PROMISE is not set +CONFIG_SATA_SIL=y +CONFIG_SATA_SIS=y +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +CONFIG_SATA_VIA=y +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5535 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +CONFIG_PATA_SCH=y +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +CONFIG_PATA_SIS=y +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_ISAPNP is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PCMCIA is not set +# CONFIG_PATA_QDI is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_WINBOND_VLB is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +# CONFIG_MULTICORE_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_OHCI_DEBUG=y +CONFIG_FIREWIRE_SBP2=m +CONFIG_FIREWIRE_NET=m +CONFIG_FIREWIRE_NOSY=m +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_IFB is not set +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_NET_SB1000 is not set +CONFIG_ARCNET=m +CONFIG_ARCNET_1201=m +# CONFIG_ARCNET_1051 is not set +# CONFIG_ARCNET_RAW is not set +# CONFIG_ARCNET_CAP is not set +CONFIG_ARCNET_COM90xx=m +# CONFIG_ARCNET_COM90xxIO is not set +# CONFIG_ARCNET_RIM_I is not set +# CONFIG_ARCNET_COM20020 is not set +CONFIG_MII=y +CONFIG_PHYLIB=m + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_LXT_PHY=m +CONFIG_CICADA_PHY=m +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=m +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM63XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_HAPPYMEAL=m +CONFIG_SUNGEM=m +CONFIG_CASSINI=m +CONFIG_NET_VENDOR_3COM=y +CONFIG_EL1=m +CONFIG_EL2=m +CONFIG_ELPLUS=m +# CONFIG_EL16 is not set +CONFIG_EL3=m +CONFIG_3C515=m +CONFIG_VORTEX=m +CONFIG_TYPHOON=m +CONFIG_LANCE=m +CONFIG_NET_VENDOR_SMC=y +CONFIG_WD80x3=m +CONFIG_ULTRA=m +CONFIG_SMC9194=m +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_RACAL=y +CONFIG_NI52=m +CONFIG_NI65=m +CONFIG_DNET=m +CONFIG_NET_TULIP=y +# CONFIG_DE2104X is not set +CONFIG_TULIP=m +# CONFIG_TULIP_MWI is not set +# CONFIG_TULIP_MMIO is not set +# CONFIG_TULIP_NAPI is not set +CONFIG_DE4X5=y +CONFIG_WINBOND_840=y +CONFIG_DM9102=y +CONFIG_ULI526X=m +CONFIG_PCMCIA_XIRCOM=y +# CONFIG_AT1700 is not set +CONFIG_DEPCA=m +CONFIG_HP100=m +CONFIG_NET_ISA=y +CONFIG_E2100=m +CONFIG_EWRK3=m +CONFIG_EEXPRESS=m +CONFIG_EEXPRESS_PRO=m +CONFIG_HPLAN_PLUS=m +CONFIG_HPLAN=m +CONFIG_LP486E=m +CONFIG_ETH16I=m +CONFIG_NE2000=m +# CONFIG_ZNET is not set +# CONFIG_SEEQ8005 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +CONFIG_NET_PCI=y +CONFIG_PCNET32=y +CONFIG_AMD8111_ETH=m +CONFIG_ADAPTEC_STARFIRE=m +# CONFIG_AC3200 is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_APRICOT=m +CONFIG_B44=m +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI=y +CONFIG_FORCEDETH=y +CONFIG_CS89x0=m +CONFIG_E100=y +CONFIG_FEALNX=m +CONFIG_NATSEMI=y +CONFIG_NE2K_PCI=y +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +CONFIG_8139TOO_TUNE_TWISTER=y +CONFIG_8139TOO_8129=y +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R6040=m +CONFIG_SIS900=y +CONFIG_EPIC100=y +CONFIG_SMSC9420=m +CONFIG_SUNDANCE=y +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_TLAN=y +# CONFIG_KS8851_MLL is not set +CONFIG_VIA_RHINE=y +CONFIG_VIA_RHINE_MMIO=y +CONFIG_SC92031=m +# CONFIG_NET_POCKET is not set +CONFIG_ATL2=m +CONFIG_NETDEV_1000=y +CONFIG_ACENIC=y +# CONFIG_ACENIC_OMIT_TIGON_I is not set +CONFIG_DL2K=m +CONFIG_E1000=m +CONFIG_E1000E=y +CONFIG_IP1000=m +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +CONFIG_NS83820=y +CONFIG_HAMACHI=y +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=y +# CONFIG_R8169_VLAN is not set +CONFIG_SIS190=m +CONFIG_SKGE=m +CONFIG_SKY2=m +CONFIG_VIA_VELOCITY=m +CONFIG_TIGON3=m +CONFIG_BNX2=m +# CONFIG_CNIC is not set +CONFIG_QLA3XXX=y +CONFIG_ATL1=y +CONFIG_ATL1E=m +CONFIG_ATL1C=m +# CONFIG_JME is not set +# CONFIG_STMMAC_ETH is not set +# CONFIG_PCH_GBE is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set +CONFIG_WLAN=y +# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_AIRO=m +CONFIG_ATMEL=m +CONFIG_PCI_ATMEL=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_AT76C50X_USB=m +CONFIG_AIRO_CS=m +CONFIG_PCMCIA_WL3501=m +CONFIG_PRISM54=m +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_RTL8180=m +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +CONFIG_ADM8211=m +# CONFIG_MAC80211_HWSIM is not set +CONFIG_MWL8K=m +CONFIG_ATH_COMMON=m +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH5K=m +# CONFIG_ATH5K_DEBUG is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K=m +CONFIG_ATH9K_RATE_CONTROL=y +CONFIG_ATH9K_HTC=m +CONFIG_AR9170_USB=m +CONFIG_AR9170_LEDS=y +# CONFIG_CARL9170 is not set +CONFIG_B43=m +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +# CONFIG_B43_PCMCIA is not set +# CONFIG_B43_SDIO is not set +CONFIG_B43_PIO=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_HWRNG=y +# CONFIG_B43LEGACY_DEBUG is not set +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set +# CONFIG_HOSTAP is not set +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y +# CONFIG_IPW2100_DEBUG is not set +CONFIG_IPW2200=m +CONFIG_IPW2200_MONITOR=y +CONFIG_IPW2200_RADIOTAP=y +CONFIG_IPW2200_PROMISCUOUS=y +CONFIG_IPW2200_QOS=y +# CONFIG_IPW2200_DEBUG is not set +CONFIG_LIBIPW=m +# CONFIG_LIBIPW_DEBUG is not set +CONFIG_IWLWIFI=m + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLAGN=m +CONFIG_IWL4965=y +CONFIG_IWL5000=y +CONFIG_IWL3945=m +CONFIG_IWM=m +# CONFIG_LIBERTAS is not set +CONFIG_HERMES=m +# CONFIG_HERMES_PRISM is not set +CONFIG_HERMES_CACHE_FW_ON_INIT=y +CONFIG_PLX_HERMES=m +CONFIG_TMD_HERMES=m +CONFIG_NORTEL_HERMES=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_ORINOCO_USB=m +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +CONFIG_P54_PCI=m +CONFIG_P54_LEDS=y +CONFIG_RT2X00=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT61PCI=m +CONFIG_RT2800PCI_PCI=y +# CONFIG_RT2800PCI is not set +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT30XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_HT=y +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set +CONFIG_WL1251=m +CONFIG_WL1251_SDIO=m +CONFIG_WL12XX=m +CONFIG_WL1271=m +CONFIG_WL1271_SDIO=m +CONFIG_WL12XX_PLATFORM_DATA=y +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set + +# +# WiMAX Wireless Broadband devices +# +CONFIG_WIMAX_I2400M=m +CONFIG_WIMAX_I2400M_USB=m +CONFIG_WIMAX_I2400M_SDIO=m +# CONFIG_WIMAX_IWMC3200_SDIO is not set +CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SMSC75XX=m +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_IPHETH=m +# CONFIG_USB_SIERRA_NET is not set +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_WAN is not set +# CONFIG_ATM_DRIVERS is not set + +# +# CAIF transport drivers +# +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PLIP is not set +CONFIG_PPP=y +# CONFIG_PPP_MULTILINK is not set +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOE=y +CONFIG_PPPOATM=m +# CONFIG_SLIP is not set +CONFIG_SLHC=y +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_VIRTIO_NET=m +CONFIG_VMXNET3=m +CONFIG_ISDN=y +CONFIG_ISDN_I4L=m +CONFIG_ISDN_PPP=y +# CONFIG_ISDN_PPP_VJ is not set +# CONFIG_ISDN_MPP is not set +# CONFIG_IPPP_FILTER is not set +CONFIG_ISDN_PPP_BSDCOMP=m +# CONFIG_ISDN_AUDIO is not set + +# +# ISDN feature submodules +# +# CONFIG_ISDN_DIVERSION is not set + +# +# ISDN4Linux hardware drivers +# + +# +# Passive cards +# +# CONFIG_ISDN_DRV_HISAX is not set + +# +# Active cards +# +# CONFIG_ISDN_DRV_ICN is not set +# CONFIG_ISDN_DRV_PCBIT is not set +# CONFIG_ISDN_DRV_SC is not set +# CONFIG_ISDN_DRV_ACT2000 is not set +CONFIG_ISDN_CAPI=m +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +CONFIG_CAPI_TRACE=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_ISDN_CAPI_CAPI20=m +CONFIG_ISDN_CAPI_CAPIFS_BOOL=y +CONFIG_ISDN_CAPI_CAPIFS=m +# CONFIG_ISDN_CAPI_CAPIDRV is not set + +# +# CAPI hardware drivers +# +CONFIG_CAPI_AVM=y +CONFIG_ISDN_DRV_AVMB1_B1ISA=m +CONFIG_ISDN_DRV_AVMB1_B1PCI=m +CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y +CONFIG_ISDN_DRV_AVMB1_T1ISA=m +CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m +CONFIG_ISDN_DRV_AVMB1_AVM_CS=m +CONFIG_ISDN_DRV_AVMB1_T1PCI=m +CONFIG_ISDN_DRV_AVMB1_C4=m +CONFIG_CAPI_EICON=y +CONFIG_ISDN_DIVAS=m +CONFIG_ISDN_DIVAS_BRIPCI=y +CONFIG_ISDN_DIVAS_PRIPCI=y +CONFIG_ISDN_DIVAS_DIVACAPI=m +CONFIG_ISDN_DIVAS_USERIDI=m +CONFIG_ISDN_DIVAS_MAINT=m +# CONFIG_ISDN_DRV_GIGASET is not set +# CONFIG_HYSDN is not set +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_L1OIP=m + +# +# mISDN hardware drivers +# +CONFIG_MISDN_HFCPCI=m +CONFIG_MISDN_HFCMULTI=m +# CONFIG_MISDN_HFCUSB is not set +CONFIG_MISDN_AVMFRITZ=m +CONFIG_MISDN_SPEEDFAX=m +CONFIG_MISDN_INFINEON=m +CONFIG_MISDN_W6692=m +CONFIG_MISDN_NETJET=m +CONFIG_MISDN_IPAC=m +CONFIG_MISDN_ISAR=m +CONFIG_ISDN_HDLC=m +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_SPARSEKMAP=m + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_SERIAL=m +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_INPORT=m +# CONFIG_MOUSE_ATIXL is not set +CONFIG_MOUSE_LOGIBM=m +CONFIG_MOUSE_PC110PAD=m +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +CONFIG_JOYSTICK_SIDEWINDER=m +# CONFIG_JOYSTICK_TMDC is not set +# CONFIG_JOYSTICK_IFORCE is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_DB9 is not set +# CONFIG_JOYSTICK_GAMECON is not set +# CONFIG_JOYSTICK_TURBOGRAFX is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=m +# CONFIG_JOYSTICK_XPAD_FF is not set +# CONFIG_JOYSTICK_XPAD_LEDS is not set +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +CONFIG_TABLET_USB_WACOM=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +# CONFIG_TOUCHSCREEN_BU21013 is not set +CONFIG_TOUCHSCREEN_CY8CTMG110=m +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +CONFIG_TOUCHSCREEN_HAMPSHIRE=m +# CONFIG_TOUCHSCREEN_EETI is not set +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +# CONFIG_TOUCHSCREEN_MCS5000 is not set +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_HTCPEN=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_QT602240=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_TPS6507X=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_AD714X=m +CONFIG_INPUT_AD714X_I2C=m +CONFIG_INPUT_PCSPKR=y +# CONFIG_INPUT_APANEL is not set +# CONFIG_INPUT_WISTRON_BTNS is not set +# CONFIG_INPUT_ATLAS_BTNS is not set +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_WINBOND_CIR is not set +CONFIG_INPUT_PCF8574=m +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +CONFIG_INPUT_ADXL34X=m +CONFIG_INPUT_ADXL34X_I2C=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PARKBD is not set +CONFIG_SERIO_PCIPS2=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_NS558=m +# CONFIG_GAMEPORT_L4 is not set +CONFIG_GAMEPORT_EMU10K1=m +# CONFIG_GAMEPORT_FM801 is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +CONFIG_NOZOMI=m + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_CS=m +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MFD_HSU is not set +CONFIG_SERIAL_CORE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_PRINTER=m +# CONFIG_LP_CONSOLE is not set +# CONFIG_PPDEV is not set +CONFIG_HVC_DRIVER=y +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_INTEL=y +CONFIG_HW_RANDOM_AMD=y +CONFIG_HW_RANDOM_GEODE=y +CONFIG_HW_RANDOM_VIA=y +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_NVRAM=y +CONFIG_RTC=m +CONFIG_GEN_RTC=m +# CONFIG_GEN_RTC_X is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_SONYPI is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +CONFIG_MWAVE=m +# CONFIG_PC8736x_GPIO is not set +# CONFIG_NSC_GPIO is not set +# CONFIG_CS5535_GPIO is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_HPET is not set +# CONFIG_HANGCHECK_TIMER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set +CONFIG_DEVPORT=y +# CONFIG_RAMOOPS is not set +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +# CONFIG_I2C_CHARDEV is not set +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_INTEL_MID is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_ISA is not set +# CONFIG_I2C_STUB is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_BASIC_MMIO is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_SCH is not set +# CONFIG_GPIO_VX855 is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_CS5535 is not set +CONFIG_GPIO_BT8XX=m +# CONFIG_GPIO_LANGWELL is not set +# CONFIG_GPIO_PCH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ20Z75 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_HWMON=m +CONFIG_HWMON_VID=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +CONFIG_SENSORS_ABITUGURU=m +CONFIG_SENSORS_ABITUGURU3=m +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADT7411=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_ASC7621=m +CONFIG_SENSORS_K8TEMP=m +CONFIG_SENSORS_K10TEMP=m +CONFIG_SENSORS_ASB100=m +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_FSCHMD=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_GPIO_FAN=m +CONFIG_SENSORS_CORETEMP=m +CONFIG_SENSORS_PKGTEMP=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_JC42=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM73=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_LTC4261=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_SMM665=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_EMC1403=m +CONFIG_SENSORS_EMC2103=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_AMC6821=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP102=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TMP421=m +CONFIG_SENSORS_VIA_CPUTEMP=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83795=m +# CONFIG_SENSORS_W83795_FANCTRL is not set +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_SENSORS_LIS3_I2C=m +CONFIG_SENSORS_APPLESMC=m + +# +# ACPI drivers +# +# CONFIG_SENSORS_ATK0110 is not set +# CONFIG_SENSORS_LIS3LV02D is not set +CONFIG_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_F71808E_WDT is not set +# CONFIG_SC520_WDT is not set +# CONFIG_SBC_FITPC2_WATCHDOG is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_WAFER_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_ITCO_WDT is not set +# CONFIG_IT8712F_WDT is not set +# CONFIG_IT87_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_60XX_WDT is not set +# CONFIG_SBC8360_WDT is not set +# CONFIG_SBC7240_WDT is not set +# CONFIG_CPU5_WDT is not set +# CONFIG_SMSC_SCH311X_WDT is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_W83627HF_WDT is not set +# CONFIG_W83697HF_WDT is not set +# CONFIG_W83697UG_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_W83977F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set + +# +# ISA-based Watchdog Cards +# +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_SDIOHOST_POSSIBLE=y +# CONFIG_SSB_SDIOHOST is not set +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y +# CONFIG_MFD_SUPPORT is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +CONFIG_AGP=m +CONFIG_AGP_ALI=m +CONFIG_AGP_ATI=m +CONFIG_AGP_AMD=m +CONFIG_AGP_AMD64=m +CONFIG_AGP_INTEL=m +CONFIG_AGP_NVIDIA=m +CONFIG_AGP_SIS=m +CONFIG_AGP_SWORKS=m +CONFIG_AGP_VIA=m +CONFIG_AGP_EFFICEON=m +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +# CONFIG_VGA_SWITCHEROO is not set +CONFIG_DRM=m +CONFIG_DRM_KMS_HELPER=m +CONFIG_DRM_TTM=m +# CONFIG_DRM_TDFX is not set +CONFIG_DRM_R128=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_RADEON_KMS=y +CONFIG_DRM_I810=m +CONFIG_DRM_I830=m +CONFIG_DRM_I915=m +CONFIG_DRM_I915_KMS=y +CONFIG_DRM_MGA=m +CONFIG_DRM_SIS=m +CONFIG_DRM_VIA=m +CONFIG_DRM_SAVAGE=m +# CONFIG_STUB_POULSBO is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_BOOT_VESA_SUPPORT=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +CONFIG_FB_BACKLIGHT=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +CONFIG_FB_VESA=y +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I810 is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_VIA is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_GEODE is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +# CONFIG_BACKLIGHT_PROGEAR is not set +# CONFIG_BACKLIGHT_MBP_NVIDIA is not set +# CONFIG_BACKLIGHT_SAHARA is not set +# CONFIG_BACKLIGHT_ADP8860 is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +# CONFIG_VGACON_SOFT_SCROLLBACK is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=m +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_RTCTIMER=m +CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_DMA_SGBUF=y +CONFIG_SND_RAWMIDI_SEQ=m +CONFIG_SND_OPL3_LIB_SEQ=m +CONFIG_SND_OPL4_LIB_SEQ=m +CONFIG_SND_SBAWE_SEQ=m +CONFIG_SND_EMU10K1_SEQ=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL4_LIB=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_MTS64 is not set +# CONFIG_SND_SERIAL_U16550 is not set +CONFIG_SND_MPU401=m +# CONFIG_SND_PORTMAN2X4 is not set +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 +CONFIG_SND_WSS_LIB=m +CONFIG_SND_SB_COMMON=m +CONFIG_SND_SB8_DSP=m +CONFIG_SND_SB16_DSP=m +CONFIG_SND_ISA=y +CONFIG_SND_ADLIB=m +CONFIG_SND_AD1816A=m +CONFIG_SND_AD1848=m +CONFIG_SND_ALS100=m +# CONFIG_SND_AZT1605 is not set +# CONFIG_SND_AZT2316 is not set +CONFIG_SND_AZT2320=m +CONFIG_SND_CMI8330=m +CONFIG_SND_CS4231=m +CONFIG_SND_CS4236=m +CONFIG_SND_ES1688=m +CONFIG_SND_ES18XX=m +CONFIG_SND_SC6000=m +CONFIG_SND_GUSCLASSIC=m +CONFIG_SND_GUSEXTREME=m +CONFIG_SND_GUSMAX=m +CONFIG_SND_INTERWAVE=m +CONFIG_SND_INTERWAVE_STB=m +CONFIG_SND_JAZZ16=m +CONFIG_SND_OPL3SA2=m +CONFIG_SND_OPTI92X_AD1848=m +CONFIG_SND_OPTI92X_CS4231=m +CONFIG_SND_OPTI93X=m +CONFIG_SND_MIRO=m +CONFIG_SND_SB8=m +CONFIG_SND_SB16=m +CONFIG_SND_SBAWE=m +# CONFIG_SND_SB16_CSP is not set +CONFIG_SND_SSCAPE=m +CONFIG_SND_WAVEFRONT=m +CONFIG_SND_MSND_PINNACLE=m +CONFIG_SND_MSND_CLASSIC=m +CONFIG_SND_PCI=y +CONFIG_SND_AD1889=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ASIHPI=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +# CONFIG_SND_BT87X_OVERCLOCK is not set +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_OXYGEN=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CS5530=m +CONFIG_SND_CS5535AUDIO=m +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INDIGODJX=m +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +# CONFIG_SND_ES1968_INPUT is not set +CONFIG_SND_FM801=m +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_HWDEP=y +# CONFIG_SND_HDA_RECONFIG is not set +# CONFIG_SND_HDA_INPUT_BEEP is not set +# CONFIG_SND_HDA_INPUT_JACK is not set +# CONFIG_SND_HDA_PATCH_LOADER is not set +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_HDMI=y +CONFIG_SND_HDA_CODEC_CIRRUS=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_POWER_SAVE=y +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=60 +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_HIFIER=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_KORG1212=m +CONFIG_SND_LX6464ES=m +CONFIG_SND_MAESTRO3=m +# CONFIG_SND_MAESTRO3_INPUT is not set +CONFIG_SND_MIXART=m +CONFIG_SND_NM256=m +CONFIG_SND_PCXHR=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SIS7019=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +CONFIG_SND_YMFPCI=m +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +CONFIG_SND_USB_USX2Y=m +CONFIG_SND_USB_CAIAQ=m +# CONFIG_SND_USB_CAIAQ_INPUT is not set +CONFIG_SND_USB_US122L=m +CONFIG_SND_PCMCIA=y +CONFIG_SND_VXPOCKET=m +CONFIG_SND_PDAUDIOCF=m +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACRUX_FF is not set +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +# CONFIG_HID_CANDO is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_PRODIKEYS is not set +CONFIG_HID_CYPRESS=y +CONFIG_HID_DRAGONRISE=y +# CONFIG_DRAGONRISE_FF is not set +# CONFIG_HID_EGALAX is not set +CONFIG_HID_EZKEY=y +CONFIG_HID_KYE=y +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +CONFIG_HID_GYRATION=y +CONFIG_HID_TWINHAN=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_LOGITECH=y +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWII_FF is not set +CONFIG_HID_MICROSOFT=y +# CONFIG_HID_MOSART is not set +CONFIG_HID_MONTEREY=y +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=y +CONFIG_HID_PANTHERLORD=y +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=y +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_QUANTA is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_ROCCAT_KONE is not set +# CONFIG_HID_ROCCAT_PYRA is not set +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +# CONFIG_HID_STANTUM is not set +CONFIG_HID_SUNPLUS=y +CONFIG_HID_GREENASIA=y +# CONFIG_GREENASIA_FF is not set +CONFIG_HID_SMARTJOYPLUS=y +# CONFIG_SMARTJOYPLUS_FF is not set +CONFIG_HID_TOPSEED=y +CONFIG_HID_THRUSTMASTER=y +# CONFIG_THRUSTMASTER_FF is not set +CONFIG_HID_ZEROPLUS=y +# CONFIG_ZEROPLUS_FF is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_MON=m +CONFIG_USB_WUSB=m +CONFIG_USB_WUSB_CBAF=m +# CONFIG_USB_WUSB_CBAF_DEBUG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_HCD_DEBUGGING is not set +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_WHCI_HCD=m +# CONFIG_USB_HWA_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_UAS is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_USS720 is not set +CONFIG_USB_SERIAL=m +# CONFIG_USB_EZUSB is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +CONFIG_USB_SERIAL_CH341=m +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SAMBA is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +CONFIG_USB_LEGOTOWER=m +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_CXACRU=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_XUSBATM=m +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_WHCI=m +CONFIG_UWB_I1480U=m +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=m +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_PCI=m +# CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_PLTFM is not set +# CONFIG_MMC_WBSD is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SDRICOH_CS is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_USHC is not set +CONFIG_MEMSTICK=m +# CONFIG_MEMSTICK_DEBUG is not set + +# +# MemoryStick drivers +# +# CONFIG_MEMSTICK_UNSAFE_RESUME is not set +CONFIG_MSPRO_BLOCK=m + +# +# MemoryStick Host Controller Drivers +# +CONFIG_MEMSTICK_TIFM_MS=m +CONFIG_MEMSTICK_JMICRON_38X=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_ALIX2 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=m +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_CLEVO_MAIL is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_DELL_NETBOOKS is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_ET131X is not set +# CONFIG_SLICOSS is not set +CONFIG_USB_IP_COMMON=m +CONFIG_USB_IP_VHCI_HCD=m +CONFIG_USB_IP_HOST=m +# CONFIG_USB_IP_DEBUG_ENABLE is not set +# CONFIG_W35UND is not set +CONFIG_PRISM2_USB=m +CONFIG_ECHO=m +# CONFIG_BRCM80211 is not set +CONFIG_RT2860=m +CONFIG_RT2870=m +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_PANEL is not set +CONFIG_R8187SE=m +CONFIG_RTL8192U=m +CONFIG_RTL8192E=m +# CONFIG_R8712U is not set +# CONFIG_TRANZPORT is not set +# CONFIG_POHMELFS is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_IDE_PHISON is not set +# CONFIG_LINE6_USB is not set +# CONFIG_DRM_VMWGFX is not set +CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_NOUVEAU_BACKLIGHT=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_USB_SERIAL_QUATECH_USB2 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_FB_UDL is not set +# CONFIG_HYPERV is not set +# CONFIG_VME_BUS is not set +# CONFIG_IIO is not set +# CONFIG_ZRAM is not set +# CONFIG_WLAGS49_H2 is not set +# CONFIG_WLAGS49_H25 is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_SAMSUNG_LAPTOP is not set +CONFIG_FB_SM7XX=m +CONFIG_CRYSTALHD=m + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_ST_BT is not set +# CONFIG_FB_XGI is not set +# CONFIG_SMB_FS is not set +# CONFIG_ACPI_QUICKSTART is not set +CONFIG_MACH_NO_WESTBRIDGE=y +# CONFIG_ATH6K_LEGACY is not set +# CONFIG_USB_ENESTORAGE is not set +# CONFIG_BCM_WIMAX is not set +# CONFIG_FT1000 is not set + +# +# Speakup console speech +# +CONFIG_SPEAKUP=m +CONFIG_SPEAKUP_SYNTH_ACNTSA=m +CONFIG_SPEAKUP_SYNTH_ACNTPC=m +CONFIG_SPEAKUP_SYNTH_APOLLO=m +CONFIG_SPEAKUP_SYNTH_AUDPTR=m +CONFIG_SPEAKUP_SYNTH_BNS=m +CONFIG_SPEAKUP_SYNTH_DECTLK=m +CONFIG_SPEAKUP_SYNTH_DECEXT=m +CONFIG_SPEAKUP_SYNTH_DECPC=m +CONFIG_SPEAKUP_SYNTH_DTLK=m +CONFIG_SPEAKUP_SYNTH_KEYPC=m +CONFIG_SPEAKUP_SYNTH_LTLK=m +CONFIG_SPEAKUP_SYNTH_SOFT=m +CONFIG_SPEAKUP_SYNTH_SPKOUT=m +CONFIG_SPEAKUP_SYNTH_TXPRT=m +CONFIG_SPEAKUP_SYNTH_DUMMY=m +CONFIG_X86_PLATFORM_DEVICES=y +CONFIG_ACER_WMI=m +CONFIG_ASUS_LAPTOP=m +# CONFIG_DELL_WMI is not set +# CONFIG_FUJITSU_LAPTOP is not set +# CONFIG_TC1100_WMI is not set +CONFIG_HP_WMI=m +CONFIG_MSI_LAPTOP=m +CONFIG_PANASONIC_LAPTOP=m +# CONFIG_COMPAL_LAPTOP is not set +CONFIG_SONY_LAPTOP=m +# CONFIG_SONYPI_COMPAT is not set +# CONFIG_IDEAPAD_LAPTOP is not set +CONFIG_THINKPAD_ACPI=m +CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y +# CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set +# CONFIG_THINKPAD_ACPI_DEBUG is not set +# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set +CONFIG_THINKPAD_ACPI_VIDEO=y +CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y +# CONFIG_SENSORS_HDAPS is not set +# CONFIG_INTEL_MENLOW is not set +CONFIG_EEEPC_WMI=m +CONFIG_ACPI_WMI=m +# CONFIG_MSI_WMI is not set +# CONFIG_ACPI_ASUS is not set +CONFIG_TOPSTAR_LAPTOP=m +# CONFIG_ACPI_TOSHIBA is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +CONFIG_ACPI_CMPC=m +# CONFIG_INTEL_IPS is not set +# CONFIG_IBM_RTL is not set + +# +# Firmware Drivers +# +# CONFIG_EDD is not set +CONFIG_FIRMWARE_MEMMAP=y +# CONFIG_DELL_RBU is not set +# CONFIG_DCDBAS is not set +CONFIG_DMIID=y +# CONFIG_ISCSI_IBFT_FIND is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_GFS2_FS=m +# CONFIG_GFS2_FS_LOCKING_DLM is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_NILFS2_FS is not set +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_LOGFS=m +CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +CONFIG_MINIX_FS=m +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +# CONFIG_NFS_V4 is not set +CONFIG_NFSD=m +CONFIG_NFSD_DEPRECATED=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V4 is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=m +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +CONFIG_NCP_FS=m +# CONFIG_NCPFS_PACKET_SIGNING is not set +# CONFIG_NCPFS_IOCTL_LOCKING is not set +# CONFIG_NCPFS_STRONG is not set +# CONFIG_NCPFS_NFS_NS is not set +# CONFIG_NCPFS_OS2_NS is not set +# CONFIG_NCPFS_SMALLDOS is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_NCPFS_EXTRAS is not set +CONFIG_CODA_FS=m +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_CODEPAGE_852=y +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +CONFIG_NLS_CODEPAGE_863=y +# CONFIG_NLS_CODEPAGE_864 is not set +CONFIG_NLS_CODEPAGE_865=y +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +CONFIG_DLM=m +# CONFIG_DLM_DEBUG is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_STRIP_ASM_SYMS=y +CONFIG_UNUSED_SYMBOLS=y +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_HARDLOCKUP_DETECTOR is not set +CONFIG_BKL=y +# CONFIG_SPARSE_RCU_POINTER is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_ASYNC_RAID6_TEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_KMEMCHECK=y +# CONFIG_STRICT_DEVMEM is not set +CONFIG_X86_VERBOSE_BOOTUP=y +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +CONFIG_DOUBLEFAULT=y +# CONFIG_IOMMU_STRESS is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=0 +# CONFIG_OPTIMIZE_INLINING is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_ASYNC_PQ=m +CONFIG_ASYNC_RAID6_RECOV=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_CRC32C_INTEL is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_AES_586=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SALSA20_586 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_TWOFISH_586=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_PADLOCK=m +CONFIG_CRYPTO_DEV_PADLOCK_AES=m +CONFIG_CRYPTO_DEV_PADLOCK_SHA=m +CONFIG_CRYPTO_DEV_GEODE=m +CONFIG_CRYPTO_DEV_HIFN_795X=m +CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_APIC_ARCHITECTURE=y +CONFIG_KVM_MMIO=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=m +CONFIG_KVM_INTEL=m +CONFIG_KVM_AMD=m +# CONFIG_VHOST_NET is not set +CONFIG_LGUEST=m +CONFIG_VIRTIO=y +CONFIG_VIRTIO_RING=y +CONFIG_VIRTIO_PCI=m +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_BTREE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y