wok view memtest/stuff/memtest86+-6-386.patch @ rev 25546
memtest: update menu label
| author | Pascal Bellard <pascal.bellard@slitaz.org> |
|---|---|
| date | Sun Mar 19 18:51:26 2023 +0000 (14 months ago) |
| parents | 2956e54cc56a |
| children | 3c71bb4367c3 |
line source
1 --- system/cpuinfo.c
2 +++ system/cpuinfo.c
3 @@ -848,6 +848,12 @@
4 default:
5 // Unknown processor - make a guess at the family.
6 switch (cpuid_info.version.family) {
7 + case 3:
8 + cpu_model = "386";
9 + break;
10 + case 4:
11 + cpu_model = "486";
12 + break;
13 case 5:
14 cpu_model = "586";
15 break;
16 --- system/cpuid.c
17 +++ system/cpuid.c
18 @@ -8,6 +8,27 @@
19 #include <stdint.h>
21 #include "cpuid.h"
22 +#include "config.h"
23 +
24 +#define AC_BIT (1<<18)
25 +#define CPUID_BIT (1<<21)
26 +static inline int has_cpuid(int bits)
27 +{
28 + int eax, edx;
29 + __asm__ __volatile__(
30 + "pushfl\n\t"
31 + "popl %0\n\t"
32 + "movl %0,%1\n\t"
33 + "xorl %2,%0\n\t"
34 + "pushl %0\n\t"
35 + "popfl\n\t"
36 + "pushfl\n\t"
37 + "popl %0\n\t"
38 + "pushl %1\n\t"
39 + "popfl\n\t"
40 + "xorl %1,%0":"=a" (eax),"=d" (edx):"c" (bits));
41 + return eax;
42 +}
44 //------------------------------------------------------------------------------
45 // Public Variables
46 @@ -24,6 +45,15 @@
47 uint32_t reg[4];
48 char *p, *q;
50 + switch (has_cpuid(AC_BIT|CPUID_BIT)) {
51 + case 0:
52 + cpuid_info.version.family = 3;
53 + return;
54 + case AC_BIT:
55 + cpuid_info.version.family = 4;
56 + return;
57 + }
58 +
59 // Get the max standard cpuid & vendor ID.
60 cpuid(0x0, 0,
61 &cpuid_info.max_cpuid,
62 --- boot/setup.S
63 +++ boot/setup.S
64 @@ -100,6 +100,29 @@
65 .long 0x10
67 do_setup:
68 +
69 + # Check cpuid support
70 +
71 + pushfl
72 + popw %dx
73 + popw %ax
74 + xorb $0x20, %al # toggle CPUID feature bit (21)
75 + pushw %ax
76 + pushw %dx
77 + popfl
78 + pushfl
79 + popw %dx
80 + popw %ax
81 + xorb %dl, %al
82 + and $0x20, %al
83 + jz 1f
84 + pushw $0x1000
85 + popw %ds
86 + movb $0xa8, %al # testb $imm %al opcode
87 + movw %ax, patch1
88 + movw %ax, patch2
89 +1:
90 +
91 # Reload the segment registers, except for the stack.
93 movw %cs, %ax
94 --- boot/startup32.S
95 +++ boot/startup32.S
96 @@ -105,6 +105,8 @@
98 # ...and check if the processor supports long mode.
100 +patch1:
101 + jmp 1f
102 movl $0x80000000, %eax # check if function 0x80000001 is available
103 pushl %ebx # ebx is overwritten by cpuid
104 cpuid
105 @@ -198,6 +200,8 @@
107 # Enable PAE if supported.
109 +patch2:
110 + jmp 1f
111 pushl %ebx # ebx is overwritten by cpuid
112 movl $0x00000001, %eax # test the PAE flag
113 cpuid
114 --- system/cache.h
115 +++ system/cache.h
116 @@ -1,6 +1,7 @@
117 // SPDX-License-Identifier: GPL-2.0
118 #ifndef CACHE_H
119 #define CACHE_H
120 +#include "cpuid.h"
121 /**
122 * \file
123 *
124 @@ -26,6 +27,7 @@
125 : "rax", "memory"
126 );
127 #else
128 + if (cpuid_info.version.family >= 4)
129 __asm__ __volatile__ ("\t"
130 "movl %%cr0, %%eax \n\t"
131 "orl $0x40000000, %%eax \n\t" /* Set CD */
132 @@ -53,6 +55,7 @@
133 : "rax", "memory"
134 );
135 #else
136 + // if (cpuid_info.version.family >= 4)
137 __asm__ __volatile__ ("\t"
138 "movl %%cr0, %%eax \n\t"
139 "andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
140 @@ -69,6 +72,7 @@
141 */
142 static inline void cache_flush(void)
143 {
144 + if (cpuid_info.version.family >= 4)
145 __asm__ __volatile__ ("\t"
146 "wbinvd\n"
147 : /* no outputs */
148 --- app/main.c
149 +++ app/main.c
150 @@ -75,6 +75,7 @@
152 static volatile int init_state = 0;
154 +static uintptr_t low_load_limit = LOW_LOAD_LIMIT;
155 static uintptr_t low_load_addr;
156 static uintptr_t high_load_addr;
158 @@ -205,6 +206,9 @@
160 cpuid_init();
162 + if (cpuid_info.version.family <= 4) // down to 1MB memory size support
163 + low_load_limit = SIZE_C(256,KB); // must be a multiple of the page size
164 +
165 // Nothing before this should access the boot parameters, in case they are located above 4GB.
166 // This is the first region we map, so it is guaranteed not to fail.
167 boot_params_addr = map_region(boot_params_addr, sizeof(boot_params_t), true);
168 @@ -282,8 +286,8 @@
170 size_t program_size = (_stacks - _start) + BSP_STACK_SIZE + (num_enabled_cpus - 1) * AP_STACK_SIZE;
172 - bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, LOW_LOAD_LIMIT)
173 - && set_load_addr(&high_load_addr, program_size, LOW_LOAD_LIMIT, HIGH_LOAD_LIMIT);
174 + bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, low_load_limit)
175 + && set_load_addr(&high_load_addr, program_size, low_load_limit, HIGH_LOAD_LIMIT);
177 trace(0, "program size %ikB", (int)(program_size / 1024));
178 trace(0, " low_load_addr %0*x", 2*sizeof(uintptr_t), low_load_addr);
179 @@ -420,7 +424,7 @@
180 // Relocation may disrupt the test.
181 window_num = 1;
182 }
183 - if (window_num == 0 && pm_limit_lower >= LOW_LOAD_LIMIT) {
184 + if (window_num == 0 && pm_limit_lower >= low_load_limit) {
185 // Avoid unnecessary relocation.
186 window_num = 1;
187 }
188 @@ -443,10 +447,10 @@
189 switch (window_num) {
190 case 0:
191 window_start = 0;
192 - window_end = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
193 + window_end = (low_load_limit >> PAGE_SHIFT);
194 break;
195 case 1:
196 - window_start = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
197 + window_start = (low_load_limit >> PAGE_SHIFT);
198 window_end = VM_WINDOW_SIZE;
199 break;
200 default:
201 --- lib/unistd.c
202 +++ lib/unistd.c
203 @@ -5,10 +5,17 @@
205 #include "cpuinfo.h"
206 #include "tsc.h"
207 +#include "io.h"
209 #include "unistd.h"
211 //------------------------------------------------------------------------------
212 +// Constants
213 +//------------------------------------------------------------------------------
214 +
215 +#define PIT_TICKS_50mS 59659 // PIT clock is 1.193182MHz
216 +
217 +//------------------------------------------------------------------------------
218 // Public Functions
219 //------------------------------------------------------------------------------
221 @@ -22,9 +29,14 @@
222 __builtin_ia32_pause();
223 } while ((get_tsc() - t0) < cycles);
224 } else {
225 - // This will be highly inaccurate, but should give at least the requested delay.
226 - volatile uint64_t count = (uint64_t)usec * 1000;
227 + volatile uint64_t count = (uint64_t)usec / 50000;
228 while (count > 0) {
229 + // Use PIT Timer
230 + outb((inb(0x61) & ~0x02) | 0x01, 0x61);
231 + outb(0xb0, 0x43);
232 + outb(PIT_TICKS_50mS & 0xff, 0x42);
233 + outb(PIT_TICKS_50mS >> 8, 0x42);
234 + while ((inb(0x61) & 0x20) == 0);
235 count--;
236 }
237 }