wok view memtest/stuff/memtest86+-6-386.patch @ rev 25512
memtest: 386/1M support
| author | Pascal Bellard <pascal.bellard@slitaz.org> |
|---|---|
| date | Tue Feb 14 07:20:48 2023 +0000 (15 months ago) |
| parents | be6d30fe521d |
| children | 2956e54cc56a |
line source
1 --- system/cpuinfo.c
2 +++ system/cpuinfo.c
3 @@ -848,6 +848,12 @@
4 default:
5 // Unknown processor - make a guess at the family.
6 switch (cpuid_info.version.family) {
7 + case 3:
8 + cpu_model = "386";
9 + break;
10 + case 4:
11 + cpu_model = "486";
12 + break;
13 case 5:
14 cpu_model = "586";
15 break;
16 --- system/cpuid.c
17 +++ system/cpuid.c
18 @@ -8,6 +8,27 @@
19 #include <stdint.h>
21 #include "cpuid.h"
22 +#include "config.h"
23 +
24 +#define AC_BIT (1<<18)
25 +#define CPUID_BIT (1<<21)
26 +static inline int has_cpuid(int bits)
27 +{
28 + int eax, edx;
29 + __asm__ __volatile__(
30 + "pushfl\n\t"
31 + "popl %0\n\t"
32 + "movl %0,%1\n\t"
33 + "xorl %2,%0\n\t"
34 + "pushl %0\n\t"
35 + "popfl\n\t"
36 + "pushfl\n\t"
37 + "popl %0\n\t"
38 + "pushl %1\n\t"
39 + "popfl\n\t"
40 + "xorl %1,%0":"=a" (eax),"=d" (edx):"c" (bits));
41 + return eax;
42 +}
44 //------------------------------------------------------------------------------
45 // Public Variables
46 @@ -24,6 +45,17 @@
47 uint32_t reg[4];
48 char *p, *q;
50 + switch (has_cpuid(AC_BIT|CPUID_BIT)) {
51 + case 0:
52 + cpuid_info.version.family = 3;
53 + pause_at_start = false;
54 + return;
55 + case AC_BIT:
56 + cpuid_info.version.family = 4;
57 + pause_at_start = false;
58 + return;
59 + }
60 +
61 // Get the max standard cpuid & vendor ID.
62 cpuid(0x0, 0,
63 &cpuid_info.max_cpuid,
64 --- boot/setup.S
65 +++ boot/setup.S
66 @@ -100,6 +100,29 @@
67 .long 0x10
69 do_setup:
70 +
71 + # Check cpuid support
72 +
73 + pushfl
74 + popw %dx
75 + popw %ax
76 + xorb $0x20, %al # toggle CPUID feature bit (21)
77 + pushw %ax
78 + pushw %dx
79 + popfl
80 + pushfl
81 + popw %dx
82 + popw %ax
83 + xorb %dl, %al
84 + and $0x20, %al
85 + jz 1f
86 + pushw $0x1000
87 + popw %ds
88 + movb $0xa8, %al # testb $imm %al opcode
89 + movw %ax, patch1
90 + movw %ax, patch2
91 +1:
92 +
93 # Reload the segment registers, except for the stack.
95 movw %cs, %ax
96 --- boot/startup32.S
97 +++ boot/startup32.S
98 @@ -105,6 +105,8 @@
100 # ...and check if the processor supports long mode.
102 +patch1:
103 + jmp 1f
104 movl $0x80000000, %eax # check if function 0x80000001 is available
105 pushl %ebx # ebx is overwritten by cpuid
106 cpuid
107 @@ -198,6 +200,8 @@
109 # Enable PAE if supported.
111 +patch2:
112 + jmp 1f
113 pushl %ebx # ebx is overwritten by cpuid
114 movl $0x00000001, %eax # test the PAE flag
115 cpuid
116 --- system/cache.h
117 +++ system/cache.h
118 @@ -1,6 +1,7 @@
119 // SPDX-License-Identifier: GPL-2.0
120 #ifndef CACHE_H
121 #define CACHE_H
122 +#include "cpuid.h"
123 /**
124 * \file
125 *
126 @@ -26,6 +27,7 @@
127 : "rax", "memory"
128 );
129 #else
130 + if (cpuid_info.version.family >= 4)
131 __asm__ __volatile__ ("\t"
132 "movl %%cr0, %%eax \n\t"
133 "orl $0x40000000, %%eax \n\t" /* Set CD */
134 @@ -53,6 +55,7 @@
135 : "rax", "memory"
136 );
137 #else
138 + // if (cpuid_info.version.family >= 4)
139 __asm__ __volatile__ ("\t"
140 "movl %%cr0, %%eax \n\t"
141 "andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
142 @@ -69,6 +72,7 @@
143 */
144 static inline void cache_flush(void)
145 {
146 + if (cpuid_info.version.family >= 4)
147 __asm__ __volatile__ ("\t"
148 "wbinvd\n"
149 : /* no outputs */
150 --- app/main.c
151 +++ app/main.c
152 @@ -75,6 +75,7 @@
154 static volatile int init_state = 0;
156 +static uintptr_t low_load_limit = LOW_LOAD_LIMIT;
157 static uintptr_t low_load_addr;
158 static uintptr_t high_load_addr;
160 @@ -205,6 +206,9 @@
162 cpuid_init();
164 + if (cpuid_info.version.family <= 4) // down to 1MB memory size support
165 + low_load_limit = SIZE_C(256,KB); // must be a multiple of the page size
166 +
167 // Nothing before this should access the boot parameters, in case they are located above 4GB.
168 // This is the first region we map, so it is guaranteed not to fail.
169 boot_params_addr = map_region(boot_params_addr, sizeof(boot_params_t), true);
170 @@ -282,8 +286,8 @@
172 size_t program_size = (_stacks - _start) + BSP_STACK_SIZE + (num_enabled_cpus - 1) * AP_STACK_SIZE;
174 - bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, LOW_LOAD_LIMIT)
175 - && set_load_addr(&high_load_addr, program_size, LOW_LOAD_LIMIT, HIGH_LOAD_LIMIT);
176 + bool load_addr_ok = set_load_addr(& low_load_addr, program_size, 0x1000, low_load_limit)
177 + && set_load_addr(&high_load_addr, program_size, low_load_limit, HIGH_LOAD_LIMIT);
179 trace(0, "program size %ikB", (int)(program_size / 1024));
180 trace(0, " low_load_addr %0*x", 2*sizeof(uintptr_t), low_load_addr);
181 @@ -420,7 +424,7 @@
182 // Relocation may disrupt the test.
183 window_num = 1;
184 }
185 - if (window_num == 0 && pm_limit_lower >= LOW_LOAD_LIMIT) {
186 + if (window_num == 0 && pm_limit_lower >= low_load_limit) {
187 // Avoid unnecessary relocation.
188 window_num = 1;
189 }
190 @@ -443,10 +447,10 @@
191 switch (window_num) {
192 case 0:
193 window_start = 0;
194 - window_end = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
195 + window_end = (low_load_limit >> PAGE_SHIFT);
196 break;
197 case 1:
198 - window_start = (LOW_LOAD_LIMIT >> PAGE_SHIFT);
199 + window_start = (low_load_limit >> PAGE_SHIFT);
200 window_end = VM_WINDOW_SIZE;
201 break;
202 default: